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It’s 2020, and it’s sunny outside. In fact, it’s so bright in your kitchen that you have to squint to see your grapefruit. You flip on your e-reader and the most recent e-issue of IEEE Spectrum pops up on-screen, the colors and text sharp and brilliant in the sunlight. There’s e-mail to answer, but you want to make the early commuter bus, so you roll up your e-reader and stuff it in your jacket pocket.

FPGAs referenced in this article have complex dedicated I/O circuitries that are primarily designed to support EMIF. The ALTMEMPHY megafunction is designed to support the most common memory standards, such as the DDR , DDR2 SDRAM, and QDR II+/QDR II SRAM (in a burst length of 4) interfaces. Other external memory standards such as Mobile DDR, QDR II+/QDR II SRAM (in burst length of 2), or customized DDR and DDR 2 SDRAM external memory standards are not supported. Instead, the ALTDLL and ALTDQ_DQS megafunctions are used to access the FPGA architecture and build a custom EMIF.

Analog Devices, Inc., has introduced a pair of Class-D audio amplifiers for smart phones, GPS units and other handheld electronics where premium sound quality offers a major competitive advantage. The SSM2375 and SSM2380 amplifiers provide audio system designers with the option of fixed or programmable gain settings combined with low noise and superior audio performance. The SSM2380 low-power, stereo Class-D amplifier is the first in its class to incorporate an I²C interface, which allows gain stages to be set from 1 dB to 24 dB (plus mute) in 47 distinct steps with no other external components required. The programmable interface also enables independent L/R channel shutdown, a variable low-EMI (electro-magnetic interference) emission control mode, and programmable ALC (automatic level control) functions for speaker protection. The SSM2380 achieves a 100-dB SNR (signal-to-noise ratio) and extends battery life by achieving 93 percent power efficiency at 5 V while running at 1.4 W into an 8-ohm speaker.

Predicting trends is difficult even by the most connected industry experts, but one trend that's easy to spot is the widespread acceptance of multicore SoC. This is happening for a number of reasons. First, it's been years since the workstation first adopted the multicore processor architecture to solve such issues as increasing performance and power concerns. While the adoption rate in workstations is now saturated and is fully supported by General Purpose OSs (GPOS), the embedded world is just now looking at ways to adopt multicore architecture. Second, several SoC vendors have been providing multicore solutions including Cavium, Freescale, MIPS, and ARM; but up until now, these solutions have been limited to networking and used for performance enhancements rather than for low power. The rest of the embedded industry has had limited hardware options available as low-power design is a driving factor. While the ARM 11 MPCore was ahead of its time, the Cortex-A9 MPCore design is ready for primetime and is gaining acceptance in the embedded marketplace. As a result, SoC vendors have adopted the Cortex-A9 MPCore hardware as a basis for their next generation designs. Over a year ago, Texas Instruments pre-announced their next-generation OMAP designs in the OMAP 4 with a dual-core Cortex-A9 MPCore, scheduled for production in the second-half of 2010. ST Microsystems has pre-announced their next generation consumer devices which will be based on the Cortex A9 MPCore.

The design of a generator system requires many hours of detailed planning with the goal of creating an extremely reliable backup power source. Properly installed, the system will deliver the intended level of reliability. However, if incorrectly wired, the system can become a problem for both the owner and the manufacturer. While the generator installation can be handled by a range of people, from a trained technician to the typical homeowner, wiring mistakes can occur. Installation includes working with 120 VAC split phase, 240 V line voltage, along with low-voltage signals below 50 V. A small and easily made mistake, such as miswiring high voltage to low voltage, will destroy sensitive electronics quickly and may render the equipment inoperable. Thus, a resettable overcurrent and overvoltage solution capable of handling line voltage, electrostatic discharge (ESD), electrical fast transients (EFT), and current surge is required to protect low voltage interface circuits against this problem.

In earlier articles on intelligent sensor design, we saw how valuable they can be to both end users and those who manufacture and sell them. It’s now time to delve more deeply into what it takes to make intelligent sensors work.   The first step in that journey is to develop a solid, intuitive understanding of the principles of digital signal processing(DSP). Unlike many introductory DSP articles and texts, the focus here will be on presenting and using the important concepts rather than deriving them, for the simple reason that addressing the subject in depth is a book-sized, not a chapter-sized, project.

Lattice Diamond design software offers leading-edge design and implementation tools optimized for cost sensitive, low-power Lattice FPGA architectures. Diamond is the next generation replacement for ispLEVER featuring design exploration, ease of use, improved design flow, and numerous other enhancements. The combination of new and enhanced features allows users to complete designs faster, easier, and with better results than ever before.

It is no secret that field-programmable gate arrays (FPGAs) are getting bigger and more complex all the time. The fabrication process creates smaller transistors and makes more dense chips packing more digital processing per nanometer. Engineers love to see advancement because it means they can do more with modern silicon, and many times NI LabVIEW FPGA Module technology helps by abstracting the complexity to a higher level so that engineers can more smoothly take advantage of these improvements.  Unfortunately, there is one issue with FPGAs that continues to be a time sink and only gets worse with denser FPGAs: compilation time.

In high-end audio equipment, careful selection of resistors is one of the best ways to avoid or minimize noise and distortion in the signal path. This paper describes the noise generation in resistors manufactured using the various available resistor technologies and quantifies the noise insertion typical for each type.

In addition to voice connectivity, digital cellular wireless networks such as GSM and its enhancement, GSM-EDGE, can now provide increased data speeds up to a (theoretical) limit of 384ﾠKbps. Third generation mobile networks, such as CDMA2000 and WCDMA or UMTS (Universal Mobile Telecommunications Standards) and TD-SCDMA (China only) are currently being deployed worldwide. These systems offer services such as video streaming, Internet browsing and, by using a technique called High Speed Packet Access (HSPA), they can in theory deliver downlink speeds up to 14,4 Mbps.