Group items tagged

Three-dimensional microchip designs are making their way to market to help pack more transistors on a chip as traditional scaling slows down. By stacking logic chips on top of one another other or combining logic chips with memory or RF with logic, chipmakers hope to sidestep Moore's Law, increasing the functionality of smartphones and other gadgets not by shrinking a chip's transistors but the distance between them. "There's a big demand for smaller packages in the consumer market, especially for the footprint of a mobile phone, or for improving the memory bandwidth of your GPU," says Pol Marchal, a principal scientist of 3-D integration at European microelectronics R&D center Imec. On 9 February, at the IEEE International Solid-State Circuits Conference (ISSCC), in San Francisco, Imec engineers presented some key design challenges facing 3-D chips made by stacking layers of silicon circuits using vertical copper interconnects called through-silicon vias (TSVs). These design constraints will have to be dealt with before TSVs can be widely used in advanced microchip architectures, Marchal says.

25 March 2010—Nowadays, a phone that doesn’t know where it is or where it’s going can’t really call itself ”smart.” To orient themselves properly, smartphones require not just GPS capability but also an electronic compass, an accelerometer, and increasingly, digital gyroscopes. The point of a gyroscope is to sense any change in an object’s axis of rotation. Up until now, gyroscopes measured movement around the three axes with three sensors—one for pitch, one for yaw, and another for roll. At most, two of these sensors would be combined on a single die. The best you could do was, say, match up a 3- by 5- by 1-millimeter yaw sensor with a 4- by 5- by 1-mm sensor that would detect pitch and roll. But on 15 February, STMicroelectronics unveiled  a 4- by 4- by 1-mm gyroscope whose single sensing structure tracks all three angular motions. It’s a triumph of microelectromechanical systems (MEMS) engineering.