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Menta SAS and LIRMM have taped out what they believe is the of worlds first MRAM-based FPGA which has patent-protected circuitry enabling compact integration of MRAM and embedded-FPGA solutions. Researchers at the Montpellier Laboratory of Informatics, Robotics and Microelectronics (LIRMM), in France, claimed in October that they had developed a FPGA circuit based on non volatile resistive memory cell.

The center piece of our toolset is the software integrated development environment or IDE. MPLAB IDE has enjoyed many years of evolution cracking Microchip’s popular catalogue of micro controllers and digital signal controllers. This presentation will cover these topics. Look at MPLAB and its components. An MPLAB IDE overview, MPLAB’s hardware components including starter kits and demonstration and evaluation kits and finally we attempt to answer the question why use Microchip tools.

Rube Goldberg couldn’t have designed a more elegant confluence of convoluted causal relationships.  Start analyzing the perplexing paradox of the FPGA synthesis market and each link of the chain reveals a bizarre force vector that eventually doubles back onto itself into an unlikely equilibrium that miraculously has held stable for a full decade despite disruptive forces of epic proportions. For over a decade now, Synplify has navigated these waters and has continued to survive and thrive through the unlikeliest of conditions.  Now in the hands of EDA giant Synopsys, the Synplify family of FPGA synthesis tools continues to evolve - with a major upgrade this fall.  When you put a digital design into an FPGA, there are two technologies that determine whether your design fits or doesn’t fit, whether it meets your timing constraints or does not, whether the power consumption will be within your limits (or those of the FPGA), or whether it fails completely, leaving your project at the mercy of major mulligans.   Those two technologies are synthesis and place-and-route. 

The embedded world is constantly changing. You might not have noticed, but if you take a minute to recall what a microcontroller system was like 10 years ago and compare it to today's latest microcontroller systems, you will find that PCB design, component packages, level of integration, clock speed, and memory size have all going through several generations of change. One of the hottest topics in this area is when will the last of remaining 8-bit microcontroller users start to move away from legacy architectures and move to modern 32-bit processor architectures like the ARM Cortex-M based microcontroller family. Over the last few years there has been a strong momentum of embedded developers starting the migration to 32-bit microcontrollers and, in this multi-part article, we will take a look at some of the factors accelerating this migration.

Using a programmable device to expand the capabilities of an embedded system, designers can reduce power consumption at the same time By Rahul V. Shah and Vishesh Agrawal

Opus is Octasic's high-performing, ultra low-power, asynchronous DSP technology optimized for basestations, video processing and media gateway solutions. Asynchronous designs deliver similar computing performance to synchronous designs, but use less silicon and less power. No clock tree No state-elements Less sensitive to process and temperature variations

RoweBots Research, Inc., a supplier of tiny embedded POSIX RTOS products, today announced the launch and release of UnisonTM Version 5 and the open-source version of Unison Version 4. These two ultra-tiny embedded-Linux and POSIX compatible RTOSs open Renesas Technology Corp.’s SH-2A Microcontroller (MCU) family to Linux and POSIX compatible development for the first time.

In then the past few years we have seen multiprocessing systems become more mainstream, in fact most modern personal computer CPUs now feature symmetric multiprocessing systems (SMP), where multiple instantiations of the same processor share the processing burden of the applications running on the PC. While SMPs are quite common today, we typically have not seen a shift towards multiprocessing in embedded computing. However, a new type of embedded design technique gives engineers the freedom to intelligently distribute processing functions across a digital subsystem. This article will look at an example of the distributed processing technique using Cypress Semiconductor's PSoC 3 and PSoC 5 architectures, which consist of a main CPU (in this case an 8051 or ARM Cortex M3), a DMA engine, and array of Universal Digital Blocks (UDB).

The MAX13171E along with the MAX13173E/ MAX13175E, form a complete pin-selectable data terminal equipment (DTE) or data communication equipment (DCE) interface port that support the V.28 (RS-232), V.10/V.11 (RS-449/V.36, RS-530, RS-530A, X.21), and V.35 protocols. The MAX13171E transceivers carry the high-speed clock and data signals, while the MAX13173E transceivers carry the control signals. The MAX13171E can be terminated by the MAX13175E pin-selectable resistor termination network. The MAX13175E contains six pin-selectable, multiprotocol cable termination networks.

Three-dimensional microchip designs are making their way to market to help pack more transistors on a chip as traditional scaling slows down. By stacking logic chips on top of one another other or combining logic chips with memory or RF with logic, chipmakers hope to sidestep Moore's Law, increasing the functionality of smartphones and other gadgets not by shrinking a chip's transistors but the distance between them. "There's a big demand for smaller packages in the consumer market, especially for the footprint of a mobile phone, or for improving the memory bandwidth of your GPU," says Pol Marchal, a principal scientist of 3-D integration at European microelectronics R&D center Imec. On 9 February, at the IEEE International Solid-State Circuits Conference (ISSCC), in San Francisco, Imec engineers presented some key design challenges facing 3-D chips made by stacking layers of silicon circuits using vertical copper interconnects called through-silicon vias (TSVs). These design constraints will have to be dealt with before TSVs can be widely used in advanced microchip architectures, Marchal says.

The main goal of this article is to focus on the difficulties encountered by SoC integrators when selecting an embedded microcontroller (MCU). Indeed, the selection is based on MCU performances, but the comparison can be difficult and compromised when considering all the parameters influencing these performances.In this article, we will detail how to assess rigorously power consumption, area, speed, code density and processing power for an embedded MCU. For each performance, we will describe how the parameters have to be selected to enable a fair comparison between processor cores.

The race to create tiny wireless sensors that could monitor anything from pressure in the eyes and brain to the stability of bridges appears to be heating up. Earlier this month, IEEE Spectrum reported on two approaches to creating an almost-indefinitely-running sensor using piezoelectric systems to convert tiny vibrations into power. Now, another team from the University of Michigan has created an alternative approach that uses solar power to keep the sensor running autonomously for many years.

Having the lowest system power allows customers to achieve their design objectives, whether it be for longer battery life, higher product performance or lower system cost. The Si100x/1x wireless MCU family features the industry’s lowest active mode current consumption, which saves power when the application is running. It also has the industry’s lowest current consumption sleep modes that save power when the device is sleeping, which is typically the majority of time in most battery powered applications.

25 March 2010—Nowadays, a phone that doesn’t know where it is or where it’s going can’t really call itself ”smart.” To orient themselves properly, smartphones require not just GPS capability but also an electronic compass, an accelerometer, and increasingly, digital gyroscopes. The point of a gyroscope is to sense any change in an object’s axis of rotation. Up until now, gyroscopes measured movement around the three axes with three sensors—one for pitch, one for yaw, and another for roll. At most, two of these sensors would be combined on a single die. The best you could do was, say, match up a 3- by 5- by 1-millimeter yaw sensor with a 4- by 5- by 1-mm sensor that would detect pitch and roll. But on 15 February, STMicroelectronics unveiled  a 4- by 4- by 1-mm gyroscope whose single sensing structure tracks all three angular motions. It’s a triumph of microelectromechanical systems (MEMS) engineering.