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The ARM Cortex™-M4 processor is the latest embedded processor by ARM specifically developed to address digital signal control markets that demand an efficient, easy-to-use blend of control and signal processing capabilities. The combination of high-efficiency signal processing functionality with the low-power, low cost and ease-of-use benefits of the Cortex-M family of processors is designed to satisfy the emerging category of flexible solutions specifically targeting the motor control, automotive, power management, embedded audio and industrial automation markets. The Cortex-M4 processor features extended single-cycle multiply-accumulate (MAC) instructions, optimized SIMD arithmetic, saturating arithmetic instructions and an optional single precision Floating Point Unit (FPU). These features build upon the innovative technology that characterizes the ARM Cortex-M series processors…

Pico Computing has developed a signal processing library which is made up of a set of FPGA firmware components and related tools that speed the development and deployment of advanced video and network analytics for security, defense and aerospace applications.The library, which includes flexible components for signal analysis, feature detection, scale-space generation, correlation and filtering, has been validated and optimized for Pico Computing platforms based on the latest-generation Xilinx Virtex-5 and Virtex-6 FPGA devices.

With the consumer demand for richer content and its resultant , increasing high data bandwidth continuing to drive communications systems, coding for error control has become extraordinarily important. One way to improve the bit error rate (BER), while maintaining high data reliability, is to use an error correction technique like the Viterbi algorithm. Originally conceived by Andrew Viterbi as an error-correction scheme for noisy digital communication, the Viterbi algorithm provides an efficient method for forward error correction (FEC) that improves channel reliability. Today, it is used in many digital communications systems in applications as diverse as CDMA and GSM digital cellular, dial-up modems, satellite, deep-space communications and 802.11 wireless LANs. It is also commonly used in speech recognition, keyword spotting and computational linguistics.

This book is intended for those who work in or provide components for industries that use digital signal processing (DSP). There is a wide variety of industries that utilize this technology. While the engineers who implement applications using DSP must be very familiar with the technology, there are many others who can benefit from a basic knowledge of its' fundamental principals, which is the goal of this book—to provide a basic tutorial on DSP.

Although signal processing is usually associated with digital signal processors, it is becoming increasingly evident that FPGAs are taking over as the platform of choice in the implementation of high-performance, high-precision signal processing. For many such applications, the choice generally boils down to using either a single FPGA, a FPGA with an associated DSP processor or a farm of DSP processors.

Xilinx Inc. today introduced the architecture for a new Extensible Processing Platform they claim will deliver unrivaled levels of system performance, flexibility and integration to developers of a wide variety of embedded systems. The ARM Cortex-A9 MPCore processor-based platform enables system architects and embedded software developers to apply a combination of serial and parallel processing to address the challenges they face in designing today's embedded systems, which must meet ever-growing demands to perform highly complex functions. The Xilinx Extensible Processing Platform offers embedded systems designers a processor-centric design and development approach for achieving the compute and processing horsepower required to drive tasks involving high-speed access to real-time inputs, high-performance processing and complex digital signal processing - or any combination thereof - needed to meet their application-specific requirements, including lower cost and power.

Earlier in this series, we touched on one problem that can arise when sampling an analog signal, namely the problem of aliasing. There are three other issues with signal sampling to which we now turn our attention: digitization effects, finite register length effects, and oversampling. So far, weve assumed that all of the signals were measuring are continuous analog values; i.e., our measurements are completely accurate. Even in the cases in which we have noise, the underlying assumption is that the measurement itself, for example the noisy sensor output voltage, is known precisely.

Realistic sound rendering can directly impact the perceived realism of users of interactive media applications. An accurate acoustic response for a virtual environment is attuned according to the geometric representation of the environment. This response can convey important details about the environment, such as the location and motion of objects. The most common approach to sound rendering is a two-stage process: Sound propagation: the computation of impulse responses (IRs) that represent an acoustic space. Audio rendering: the generation of spatialized audio signal from the impulse responses and dry (anechoically recorded or synthetically generated) source signals.

National Instruments has released a vision module for the PXI platform that provides a high-performance parallel processing architecture for hardware-defined timing, control and image pre-processing. The NI 1483 Camera Link adapter module, in combination with an NI FlexRIO field-programmable gate array (FPGA) board, offers a solution for embedding vision and control algorithms directly on FPGAs which are used to process and analyse an image in real time with little to no CPU intervention. The FPGAs can be used to perform operations by pixel, line and region of interest. They can implement many image processing algorithms that are inherently parallel, including fast Fourier transforms (FFTs), thresholding and filtering.

Analog Devices, Inc., has introduced a pair of Class-D audio amplifiers for smart phones, GPS units and other handheld electronics where premium sound quality offers a major competitive advantage. The SSM2375 and SSM2380 amplifiers provide audio system designers with the option of fixed or programmable gain settings combined with low noise and superior audio performance. The SSM2380 low-power, stereo Class-D amplifier is the first in its class to incorporate an I²C interface, which allows gain stages to be set from 1 dB to 24 dB (plus mute) in 47 distinct steps with no other external components required. The programmable interface also enables independent L/R channel shutdown, a variable low-EMI (electro-magnetic interference) emission control mode, and programmable ALC (automatic level control) functions for speaker protection. The SSM2380 achieves a 100-dB SNR (signal-to-noise ratio) and extends battery life by achieving 93 percent power efficiency at 5 V while running at 1.4 W into an 8-ohm speaker.

This article discusses the requirements, constraints and challenges in creating high-quality musical instruments using electronic components (both analog and digital) available today.

DSP core licensor Ceva Inc. is due to unveil a software-programmable multimedia video processor architecture at the Mobile World Congress in Barcelona next week. The multicore architecture, called MM3000, which comes complete with C compilers, power management provision and an RTOS/multithreading scheduler is intended to be able to process any and all video codecs up to the highest resolutions and frame rates currently available as well as future codecs for things like 3-D video.

High Level Synthesis Architectural Optimization Basics In part 1 of this article we introduced basic filter bank theory and used the Synplify DSP High Level Synthesis (HLS) tool to implement an example filter bank into three alternative architectures. In part 2 we dive deeper into these three architectures to better understand how these filters work. We will also examine the HLS optimizations we applied and the resulting benefits. Example Filter Bank Review Before we proceed, let's quickly review our filter bank example. Our example, shown in Figure 1, is a size 16 DFT filter bank. The color scheme shows the sample rate change where a 16 MHz input sample rate (red) has been chosen and the output sample rate is downsampled by 16 (green).

Every few years, we're wowed by news of some jaw-dropping sum paid for a previously unknown painting or drawing by a famous artist. But how can a buyer truly be sure that a piece is a legitimate creation of, say, Leonardo or Gauguin? Mathematicians at Dartmouth College, in Hanover, N.H., may have the answer. They recently presented a computer-based statistical analysis technique which they say will help art historians and conservators discover even the most skilled forgery. Their method, called sparse coding, learns what characterizes the artist's style at a level of detail that is practically imperceptible to the eye of even the most experienced appraiser. It works by examining small patches of a picture and breaking them down to a set of essential elements.

A new triple-rate (3G/HD/SD) audio/video clock generator from National Semiconductor Corp., eliminates the need for external clock conditioning in professional and broadcast video equipment. The LMH1983 produces all the major video and audio reference clocks required for a broad range of applications. The highly integrated LMH1983 also provides the industry’s lowest-output jitter (40 ps peak-to-peak), enabling Society of Motion Picture and Television Engineers (SMPTE) compliance using field-programmable gate array (FPGA) SerDes transceivers.