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Every few years, we're wowed by news of some jaw-dropping sum paid for a previously unknown painting or drawing by a famous artist. But how can a buyer truly be sure that a piece is a legitimate creation of, say, Leonardo or Gauguin? Mathematicians at Dartmouth College, in Hanover, N.H., may have the answer. They recently presented a computer-based statistical analysis technique which they say will help art historians and conservators discover even the most skilled forgery. Their method, called sparse coding, learns what characterizes the artist's style at a level of detail that is practically imperceptible to the eye of even the most experienced appraiser. It works by examining small patches of a picture and breaking them down to a set of essential elements.

Related to the strong demands for virtualization technology, network I/O virtualization has recently become a hot topic and is one of the key topics being discussed at the upcoming Multicore Expo @ ESC. In fact, analyst firm IDC, in a recent white paper titled "Optimizing I/O Virtualization: Preparing the Data Center for Next-Generation Applications", stated that "If I/O is not sufficient, then it could limit all the gains brought about by the virtualization process."

Researchers at the NanoRobotics Laboratory of the École Polytechnique de Montréal, in Canada, are putting swarms of bacteria to work, using them to perform micro-manipulations and even propel microrobots. Led by Professor Sylvain Martel, the researchers want to use flagellated bacteria to carry drugs into tumors, act as sensing agents for detecting pathogens, and operate micro-factories that could perform pharmacological and genetic tests. They also want to use the bacteria as micro-workers for building things. Things like a tiny step pyramid. The video below shows some 5000 bacteria moving like a swarm of little fish, working together to transport tiny epoxy bricks and assemble a pyramidal structure -- all in 15 minutes. The video was presented at IROS last year, along with a wonderfully titled paper, "A Robotic Micro-Assembly Process Inspired By the Construction of the Ancient Pyramids and Relying on Several Thousands of Flagellated Bacteria Acting as Workers."

Andrew Phillips holds the title of Scientist with Microsoft Research Cambridge, and he's working on a method of programming that compiles into DNA. Part of this involves a visual programming language called Stochastic Pi Machine, or SPiM. This system models biological processes to help give researchers feedback on how organisms will react to modifications. The hope is that this can be used to help scientists program for large biological systems using modular components compiled to DNA. Yes, I’m in way over my head here, but I do my best to ask Andrew about the role this will play in medical treatment going forward, what it means to DNA computing, and the ability of back-engineering the genetic code we don’t use now.

Breadboarding a new circuit is a key skill and an important step in many projects—especially early on, when you need to move wires around and substitute components. But that very flexibility also makes it easy to knock wires out. Eventually, if your project is a keeper, you’re going to want something with a bit more permanence. Printed circuit boards (PCBs) solve all those shortcomings. But most people don’t even consider translating a one-off project into a PCB design. For one thing, PCB fabrication has traditionally been expensive, viable only in commercial quantities. (One alternative is to do it yourself with etches and silk screens, a messy and time-consuming process.) Also, there are technical constraints involved with PCB designs that are daunting to the casual hobbyist. But it turns out that nowadays you can produce a professional PCB very inexpensively.

Analog Devices, Inc., has introduced a pair of Class-D audio amplifiers for smart phones, GPS units and other handheld electronics where premium sound quality offers a major competitive advantage. The SSM2375 and SSM2380 amplifiers provide audio system designers with the option of fixed or programmable gain settings combined with low noise and superior audio performance. The SSM2380 low-power, stereo Class-D amplifier is the first in its class to incorporate an I²C interface, which allows gain stages to be set from 1 dB to 24 dB (plus mute) in 47 distinct steps with no other external components required. The programmable interface also enables independent L/R channel shutdown, a variable low-EMI (electro-magnetic interference) emission control mode, and programmable ALC (automatic level control) functions for speaker protection. The SSM2380 achieves a 100-dB SNR (signal-to-noise ratio) and extends battery life by achieving 93 percent power efficiency at 5 V while running at 1.4 W into an 8-ohm speaker.

A new triple-rate (3G/HD/SD) audio/video clock generator from National Semiconductor Corp., eliminates the need for external clock conditioning in professional and broadcast video equipment. The LMH1983 produces all the major video and audio reference clocks required for a broad range of applications. The highly integrated LMH1983 also provides the industry’s lowest-output jitter (40 ps peak-to-peak), enabling Society of Motion Picture and Television Engineers (SMPTE) compliance using field-programmable gate array (FPGA) SerDes transceivers.

Power and energy are key design considerations across a spectrum of computing solutions, from supercomputers and data centers to handheld phones and other mobile computers. A large body of work focuses on managing power and improving energy efficiency. While prior work is easily summarized in two words—"Avoid waste!"—the challenge is figuring out where and why waste happens and determining how to avoid it. In this article, I discuss how, at a general level, many inefficiencies, or waste, stem from the inherent way system architects address the complex trade-offs in the system-design process. I discuss common design practices that lead to power inefficiencies in typical systems and provide an intuitive categorization of high-level approaches to addressing them. The goal is to provide practitioners—whether in systems, packaging, algorithms, user interfaces, or databases—a set of tools, or "recipes," to systematically reason about and optimize power in their respective domains.

This white paper looks at a number of key techniques to optimize the systems engineering process and ensure project success. It examines the business benefits the techniques can provide and looks at IBM Rational solutions that are available to support the techniques.

Have you ever written code that behaves correctly under a simulator only to have intermittent failures in the field? Or maybe your code no longer functions properly when you compile with a newer version of your tool chain. You review your test bench and verify 100 percent complete test coverage and that all tests have passed with no errors--yet the problem stubbornly remains. While designers understandably place great emphasis on coding and simulation, they often have only a nodding acquaintance with the internal workings of the silicon within an FPGA. As a result, incorrect logic synthesis and timing problems, rather than logic errors, are the cause of most logic failures. But writing FPGA code that creates predictable, reliable logic is simple if designers take the right steps. In FPGA design, logic synthesis and related timing closure occur during compilation. And many things, including I/O cell structure, asynchronous logic and timing constraints, can have a big impact on the compilation process, varying results with each pass through the tool chain. Let's take a closer look at ways to eliminate these variances to better and more quickly achieve timing closure.

GetRobo has pointed out a new website by Francisco Paz, which focuses on his experience building an open source personal robot called Qbo.  From the few images on the site Qbo looks remarkably well made and quite similar to NEC’s PaPeRo, meaning it might be used to experiment with image processing, speech recognition, speech synthesis, and (assuming it has wheels) obstacle detection and SLAM.  He also mentions in his blog some of the open source software that’s out in the wild such as OpenCV, Festival, and Sphinx, which would allow you to do some of that.

In this demo we showcase efforts in MSR to collaborate with external researchers to explore the application of new technologies, specifically Dryad and DryadLINQ, to big data research problems in science. We also highlight our efforts to provide software and services to academics across the world, through the release of Dryad and DryadLINQ free of charge to the research community, along with associated programming guides, user documentation, and code libraries. Dryad is a general-purpose distributed computing engine, more flexible than MapReduce or Hadoop!, that was designed to simplify the task of implementing distributed applications on clusters of Windows computers. DryadLINQ is an abstraction layer which simplifies the process of implementing Dryad-based applications. Microsoft Research is acutely aware of the ubiquity of big data and the challenges this presents. We are offering researchers the tools, resources and collaboration to explore this new area.

If you're a long time reader, you may remember our mention in 2008 of Emanuel Diamant's provocatively titled paper "I'm sorry to say, but your understanding of image processing fundamentals is absolutely wrong" (PDF). Diamant is back with a presentation created for the 3rd Israeli Conference on Robotics, with the equally provocative title: "It's Cognitive Robotics, Stupid" (PDF). In it he laments the lack of agreed upon definitions for words like intelligence, knowledge, and information that are crucial to the development of robotics.

Length-match your traces to within 100 mils. Or is it 10 mils? Or should you go down to 1 mil? Should you include the lengths of the vias? How about the lengths of resistors? Understanding the origin of length-matching requirements, coupled with some rudimentary signal integrity analysis, can help answer these questions.   Determining length requirements requires an understanding of flight time, electrical length vs. physical length, loading and signal quality. Those elements are vital in determining what the length really needs to be, as well as in determining the allowable trade-offs to meet system timing goals.

In recent years, ‘social’ robots—cleaning robots, nursing-care robots, robot pets and the like—have started to penetrate into people’s everyday lives. Saerbeck and other robotics researchers are now scrambling to develop more sophisticated robotic capabilities that can reduce the ‘strangeness’ of robot interaction. “When robots come to live in a human space, we need to take care of many more things than for manufacturing robots installed on the factory floor,” says Haizhou Li, head of the Human Language Technology Department at the A*STAR Institute for Infocomm Research. “Everything from design to the cognitive process needs to be considered.”

Intel unveiled plans Monday to take supercomputing performance to levels that are orders of magnitude greater than currently possible by the end of the decade. Coincidentally, the news broke just after Japan's K supercomputer had been named the world's fastest, with over three times the processing power as the previous title holder, China's Tianhe-1A system. The power of supercomputers shows no signs of abating. Intel said its new Many Integrated Core (MIC) architecture will deliver exaflop-scale supercomputing by 2018, with the fastest supercomputers reaching up to 4 exaflops of performance by 2020.