Electronic Everything!

With the introduction of the WEBENCH Online Design Environment in 1999, National Semiconductor made it possible for design engineers to create a reliable power supply circuit over the internet in minutes. The user specified the circuit performance and the WEBENCH Toolset delivered. Today, WEBENCH Designer creates and presents all of the possible power, lighting, or sensing circuits that meet a design requirement in seconds. This enables the user to make value based comparisons at a system and supply chain level before a design is committed. This expert analysis is not possible anywhere else.

A new form of propulsion that could allow microrobots to explore human bodies has been discovered. The technique would be used to power robots and other devices such as microfluidic pumps from a distance. Finding a propulsion mechanism that works on the microscopic scale is one of the key challenges for developing microrobots. Another is to find a way to supply such a device with energy because there is so little room to carry on-board fuel or batteries. Now a team lead by Orlin Velev at North Carolina State University in Raleigh, US, has found that a simple electronic diode could overcome both these problems. Velev and Vesselin Paunov from the University of Hull, UK, floated a diode in a tank of salt water and zapped the set-up with an alternating electric field.

A new form of propulsion that could allow microrobots to explore human bodies has been discovered. The technique would be used to power robots and other devices such as microfluidic pumps from a distance. Finding a propulsion mechanism that works on the microscopic scale is one of the key challenges for developing microrobots. Another is to find a way to supply such a device with energy because there is so little room to carry on-board fuel or batteries. Now a team lead by Orlin Velev at North Carolina State University in Raleigh, US, has found that a simple electronic diode could overcome both these problems. Velev and Vesselin Paunov from the University of Hull, UK, floated a diode in a tank of salt water and zapped the set-up with an alternating electric field.

This article features an example chapter from a new *Hot-off-the-Press* book on FPGA Design that just recently hit the streets in August 2010. This chapter is reproduced here with the kind permission of the publisher – Springer. This book -- FPGA Design: Best Practices for Team-Based Design -- describes best practices for successful FPGA design. It is the result of the author’s meetings with hundreds of customers on the challenges facing each of their FPGA design teams. By gaining an understanding into their design environments, processes, what works and what does not work, key areas of concern in implementing system designs have been identified and a recommended design methodology to overcome these challenges has been developed.

Have you ever written code that behaves correctly under a simulator only to have intermittent failures in the field? Or maybe your code no longer functions properly when you compile with a newer version of your tool chain. You review your test bench and verify 100 percent complete test coverage and that all tests have passed with no errors--yet the problem stubbornly remains. While designers understandably place great emphasis on coding and simulation, they often have only a nodding acquaintance with the internal workings of the silicon within an FPGA. As a result, incorrect logic synthesis and timing problems, rather than logic errors, are the cause of most logic failures. But writing FPGA code that creates predictable, reliable logic is simple if designers take the right steps. In FPGA design, logic synthesis and related timing closure occur during compilation. And many things, including I/O cell structure, asynchronous logic and timing constraints, can have a big impact on the compilation process, varying results with each pass through the tool chain. Let's take a closer look at ways to eliminate these variances to better and more quickly achieve timing closure.

While the new multicore system on chip (SoC) signal-processing architecture announced by Texas Instruments this week at Mobile World Congress hits all the right notes with respect to what's needed in next-generation basestation designs, it rings a bit hollow given how sketchy the architectural details remain when contrasted with more 'real' announcements from the likes of Freescale. For sure, the requirements of next-generation basestations will push all architectures to their limits and beyond. Balancing lower power and lower cost with increasingly parallel, math-intensive processing to meet multiuser demands for high-data-rate data in 3GPP Long Term Evolution (LTE) Release 8 all-IP networks is not going to be easy, especially with the introduction of MIMO, beam forming, OFDMA and many other enhancements engineered to maximize spectral efficiency.

RoweBots Research, Inc., a supplier of tiny embedded POSIX RTOS products, today announced the launch and release of UnisonTM Version 5 and the open-source version of Unison Version 4. These two ultra-tiny embedded-Linux and POSIX compatible RTOSs open Renesas Technology Corp.’s SH-2A Microcontroller (MCU) family to Linux and POSIX compatible development for the first time.

The aptly-named StickyBot is a gecko-like robot that can climb smooth surfaces using its feet, which are covered in small, dry rubbery hairs (called setae on the gecko) which provide enough surface tension for dry adhesion. While the original StickyBot has 4 toes per foot, the team at Stanford has created the SB2 which has only 2 toes per foot while still retaining its climbing ability.

The marriage of high performance optics with microfluidics could prove the perfect match for making lab-on-a-chip technologies more practical. Microfluidics, the ability to manipulate tiny volumes of liquid, is at the heart of many lab-on-a-chip devices. Such platforms can automatically mix and filter chemicals, making them ideal for disease detection and environmental sensing. The performance of these devices, however, is typically inferior to larger scale laboratory equipment. While lab-on-a-chip systems can deliver and manipulate millions of liquid drops, there is not an equally scalable and efficient way to detect the activity, such as biological reactions, within the drops.

The goal of Long Term Evolution (LTE) is to achieve higher data rates through more efficient transmission, and thus improving the cellular phone user experience by enabling powerful new devices. The changes required in this technology present new challenges for base station vendors and their suppliers. Supporting 4G systems efficiently requires a number of innovations in DSP design; these innovations are moving the industry toward SoC architectures to support such systems. This paper will explore how TI's new architecture enables the key features in 4G systems.

Opus is Octasic's high-performing, ultra low-power, asynchronous DSP technology optimized for basestations, video processing and media gateway solutions. Asynchronous designs deliver similar computing performance to synchronous designs, but use less silicon and less power. No clock tree No state-elements Less sensitive to process and temperature variations

Hardware modifications and gadgets for ZX Spectrum and compatibles

Multisim 11 is the latest version of its circuit simulation software, with specialized editions for both hands-on learning and professional circuit design. The easy-to-use Multisim software delivers a graphical approach that abstracts the complexities of traditional circuit simulation, helping educators, students and engineers employ advanced circuit analysis technology. The academic edition of Multisim 11 incorporates specialized teaching features and is complemented by circuits textbooks and courseware. This integrated system helps educators engage students and reinforce circuit theory with an interactive, hands-on approach to investigating circuit behavior. Multisim 11 Professional helps engineers optimize circuit designs, minimize errors and reduce prototype iterations. When combined with the new NI Ultiboard 11 layout and routing software, Multisim provides engineers a cost-effective, end-to-end prototyping platform. Its integration with NI LabVIEW measurement software also helps engineers define custom analyses to improve design validation…

DSP core licensor Ceva Inc. is due to unveil a software-programmable multimedia video processor architecture at the Mobile World Congress in Barcelona next week. The multicore architecture, called MM3000, which comes complete with C compilers, power management provision and an RTOS/multithreading scheduler is intended to be able to process any and all video codecs up to the highest resolutions and frame rates currently available as well as future codecs for things like 3-D video.

The potential for the QTC material to transition from an insulator to a conductor (i.e. change its electrical property) is influenced by how much deformation the material is experiencing as a result of the applied mechanical pressure. QTC can be used to produce low profile, low cost, pressure activated switches or sensors that display variable resistance with applied force and return to a quiescent state when the force is removed. The difference between a QTC switch and a QTC sensor is arguably only the speed and amount of physical input required to achieve the required switching point or resistance range.

Scientists have great expectations that nanotechnologies will bring them closer to the goal of creating computer systems that can simulate and emulate the brain's abilities for sensation, perception, action, interaction and cognition while rivaling its low power consumption and compact size. DARPA for instance, the U.S. military's research outfit known for projects that are pushing the envelope on what is technologically possible, has a program called SyNAPSE that is trying to develop electronic neuromorphic machine technology that scales to biological levels. Started in late 2008 and funded with $4.9 million, the goal of the initial phase of the SyNAPSE project is to "develop nanometer scale electronic synaptic components capable of adapting the connection strength between two neurons in a manner analogous to that seen in biological systems, as well as, simulate the utility of these synaptic components in core microcircuits that support the overall system architecture."

The main goal of this article is to focus on the difficulties encountered by SoC integrators when selecting an embedded microcontroller (MCU). Indeed, the selection is based on MCU performances, but the comparison can be difficult and compromised when considering all the parameters influencing these performances.In this article, we will detail how to assess rigorously power consumption, area, speed, code density and processing power for an embedded MCU. For each performance, we will describe how the parameters have to be selected to enable a fair comparison between processor cores.

Supporting the Wind River Systems VxWorks operating system on Intel architecture is valuable for customers who would like to preserve their application software and evaluate other architectures for comparison purposes or for architecture conversion. Products from Wind River Systems, particularly VxWorks, offer a great opportunity to address multiple architectures with the same real-time operating system (RTOS). Furthermore, the continuous development and migration of multicore platforms has increased the focus on migrating software to multicore and performance optimizations given a specified software workload and certain hardware resources.

DMA is used in almost every complex system or subsystems, but it's observed that teams either build the DMA controller from scratch for each project for specific application or take the existing DMAC available from elsewhere. This article discusses the architecture of DMAC that can be used with any kind of Bus, configuration (parallel, serial transfers), can be connected to any kind of ports, most importantly any kind of software assumptions can be implemented in the DMAC very easily.

The MiniZeni series from Sharp radiates high efficiency, deliver high color rendering index (CRI) values of up to 87 and boast a long service life whilst measuring only 15x12x1.6mm. The six new models of the MiniZeni series are characterised by four special features: they have compact outer dimensions and are extremely flat, economical and bright.

INTEL HELD AN EVENT in London last night to talk up its Core i3, i5 and i7 processors. To highlight the ceaseless march of technology and Chipzilla's own adherence to its beloved Moore's Law, the company was showcasing technology from the last 20 years as well as having a few demos about things we may expect to see in the future. Among these was this demonstration about the sorts of applications, such as advanced 3D rendering, that become feasible when a single processor can have 48 or more cores. µ