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In then the past few years we have seen multiprocessing systems become more mainstream, in fact most modern personal computer CPUs now feature symmetric multiprocessing systems (SMP), where multiple instantiations of the same processor share the processing burden of the applications running on the PC. While SMPs are quite common today, we typically have not seen a shift towards multiprocessing in embedded computing. However, a new type of embedded design technique gives engineers the freedom to intelligently distribute processing functions across a digital subsystem. This article will look at an example of the distributed processing technique using Cypress Semiconductor's PSoC 3 and PSoC 5 architectures, which consist of a main CPU (in this case an 8051 or ARM Cortex M3), a DMA engine, and array of Universal Digital Blocks (UDB).

From multicore to many-core to hard-to-describe-in-a-single-word core

DMA is used in almost every complex system or subsystems, but it's observed that teams either build the DMA controller from scratch for each project for specific application or take the existing DMAC available from elsewhere. This article discusses the architecture of DMAC that can be used with any kind of Bus, configuration (parallel, serial transfers), can be connected to any kind of ports, most importantly any kind of software assumptions can be implemented in the DMAC very easily.

Today I'm excited to share the project a small team of amazing people and I have been working on for the past two years; HipHop for PHP. With HipHop we've reduced the CPU usage on our Web servers on average by about fifty percent, depending on the page. Less CPU means fewer servers, which means less overhead. This project has had a tremendous impact on Facebook. We feel the Web at large can benefit from HipHop, so we are releasing it as open source this evening in hope that it brings a new focus toward scaling large complex websites with PHP. While HipHop has shown us incredible results, it's certainly not complete and you should be comfortable with beta software before trying it out. HipHop for PHP isn't technically a compiler itself. Rather it is a source code transformer. HipHop programmatically transforms your PHP source code into highly optimized C++ and then uses g++ to compile it. HipHop executes the source code in a semantically equivalent manner and sacrifices some rarely used features — such as eval() — in exchange for improved performance. HipHop includes a code transformer, a reimplementation of PHP's runtime system, and a rewrite of many common PHP Extensions to take advantage of these performance optimizations.

Let’s face it. Most of the gear you use at work or play has multicore processors in it. Your laptop has them (the CPU itself has two cores, and the dedicated graphics processor has many more). That game console in the living room has still more, and even a high-end smartphone typically has a CPU and graphics core on a single chip. Out of sight but definitely not out of mind–particularly if they cease working–are the servers and high-throughput network routers, all which have numerous multicore processors in them. The multiple cores in these devices work in concert to provide quick responses to user queries or to manage the smooth flow of data throughout the office.

National Instruments has released a vision module for the PXI platform that provides a high-performance parallel processing architecture for hardware-defined timing, control and image pre-processing. The NI 1483 Camera Link adapter module, in combination with an NI FlexRIO field-programmable gate array (FPGA) board, offers a solution for embedding vision and control algorithms directly on FPGAs which are used to process and analyse an image in real time with little to no CPU intervention. The FPGAs can be used to perform operations by pixel, line and region of interest. They can implement many image processing algorithms that are inherently parallel, including fast Fourier transforms (FFTs), thresholding and filtering.

Researchers at Purdue University have developed a new design employing carbon nanotubes and small copper spheres that wicks water passively towards hot electronics that could meet the challenges brought on by increasing frequency speeds in chips. The problem of overheating electronics is well-documented and in the past the issue has been addressed with bigger and bigger fans. But with chip features shrinking below 50 nanometers the fan solution is just not cutting it. The Purdue researchers, led by Suresh V. Garimella, came up with a design that uses water as the coolant liquid and transfers the water to an ultrathin thermal ground plane. The design naturally pushes the water through obviating the need for a pump and through the use of microfluidic design is able to boil the water fully, which allows the wicking away of more heat.

The MATLAB team at MathWorks tested performance scaling of the backslash ("\") matrix division operator to solve for x in the equation A*x = b. In their testing, matrix A occupies far more memory (290 GB) than is available in a single high-end desktop machine—typically a quad core processor with 4-8 GB of RAM, supplying approximately 20 Gigaflops. Therefore, they spread the calculation across machines. In order to solve linear systems of equations they need to be able to access all of the elements of the array even when the array is spread across multiple machines. This problem requires significant amounts of network communication, memory access, and CPU power. They scaled up to a cluster in EC2, giving them the ability to work with larger arrays and to perform calculations at up to 1.3 Teraflops, a 60X improvement. They were able to do this without making any changes to the application code. Here's a graph showing the near-linear scalability of an EC2 cluster across a range of matrix sizes with corresponding increases in cluster size for MATLAB's parallel backslash operator:

CPU clock speeds have remained essentially constant over the last several years, resulting in the number of CPU's used in high-end systems rapidly increasing to keep up with the performance boosts expected by Moore's law. System size on the Top500 list has changed rapidly, and, in November 2009, the top ten systems averaged 134,893 cores, with five systems larger than 100,000 cores. This rapid increase of system size and the associated increase in the number of compute elements used in a single user job increase the urgency of dealing with system characteristics that impede application scalability.

The first textbook of its kind, Programming Massively Parallel Processors: A Hands-on Approach launches today, authored by Dr. David B. Kirk, NVIDIA Fellow and former chief scientist, and Dr. Wen-mei Hwu, who serves at the University of Illinois at Urbana-Champaign as Chair of Electrical and Computer Engineering in the Coordinated Science Laboratory, co-director of the Universal Parallel Computing Research Center and principal investigator of the CUDA Center of Excellence. The textbook, which is 256 pages, is the first aimed at teaching advanced students and professionals the basic concepts of parallel programming and GPU architectures. Published by Morgan Kaufmann, it explores various techniques for constructing parallel programs and reviews numerous case studies. With conventional CPU-based computing no longer scaling in performance and the world’s computational challenges increasing in complexity, the need for massively parallel processing has never been greater. GPUs have hundreds of cores capable of delivering transformative performance increases across a wide range of computational challenges. The rise of these multi-core architectures has raised the need to teach advanced programmers a new and essential skill: how to program massively parallel processors.

In what comes as a bit of a surprise, Fuji Soft Inc.’s new humanoid robot platform for hobbyists and researchers has been given the name PALRO (pal + robot).  Naturally we feel this name is a superb choice!  Sales to research institutions will begin on March 15th, 2010 with a general release following later in the year.  The robot combines Fuji Soft’s software prowess with an open architecture which will give developers plenty of room to experiment. PALRO stands 39.8cm (15″) tall and weighs 1.9kg (3.5 lbs), and here’s the good news: it costs 298,000 JPY ($3300 USD).  Considering PALRO has 20 DOF, a camera, 4 directional microphones, a speaker, LED arrays in its head and chest, 4 pressure sensors in each foot, 3-axis gyro sensor, an accelerometer, and an Intel Atom 1.6GHz CPU, it is priced very competitively.  A comparative robot kit like Vstone’s Robovie-PC for example, costs $1100 USD more and doesn’t have such a fancy exoskeleton.