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Meeting timing specs on boards with picoseconds of margin - 0 views

  • Length-match your traces to within 100 mils. Or is it 10 mils? Or should you go down to 1 mil? Should you include the lengths of the vias? How about the lengths of resistors? Understanding the origin of length-matching requirements, coupled with some rudimentary signal integrity analysis, can help answer these questions.   Determining length requirements requires an understanding of flight time, electrical length vs. physical length, loading and signal quality. Those elements are vital in determining what the length really needs to be, as well as in determining the allowable trade-offs to meet system timing goals.
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AWR: The advantages of multi-rate harmonic balance technology - 0 views

  • Harmonic balance (hB) analysis is a method used to calculate the nonlinear, steady-state frequency response of electrical circuits. It is extremely well-suited for designs in which transient simulation methods prove acceptable, such as dispersive transmission lines in which circuit time constants are large compared to the period of the simulation frequency, as well as for circuits that have a large number of reactive components. In particular, harmonic balance analysis works extremely well for microwave circuits that are excited with sinusoidal signals, such as mixers and power amplifiers...
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Tutorial: Improving the transient immunity of your microcontroller-based embedded desig... - 0 views

  • In many instances, the way embedded software is structured and how it interacts with the hardware in a system can have a profound effect on the transient immunity performance of a system. It can be impractical and costly to completely eliminate transients at the hardware level, so the system and software designers should plan for the occasional erroneous signal or power glitch that could cause the software to perform erratically. Erratic actions on the part of the software can be classified into two different categories:
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SRI International's Electroadhesive Robots - 0 views

  • Events such as natural disasters, military actions, and public safety threats have led to an increased need for robust robots — especially ones that can travel across complex terrain in any dimension. The ability to scale vertical building surfaces or other structures offers unique capabilities in military applications such as urban reconnaissance, sensor deployment, and setting up urban network nodes. SRI's novel clamping technology, called compliant electroadhesion, has enabled the first application of this technology to wall-climbing robots that can help with these situations.  As the name implies, electroadhesion is an electrically controllable adhesion technology. It involves inducing electrostatic charges on a wall substrate using a power supply connected to compliant pads situated on the moving robot. SRI has demonstrated robust clamping to common building materials including glass, wood, metal, concrete, etc. with clamping pressures in the range of 0.5 to 1.5 N per square cm of clamp (0.8 to 2.3 pounds per square inch). The technology works on conductive and non-conductive substrates, smooth or rough materials, and through dust and debris. Unlike conventional adhesives or dry adhesives, the electroadhesion can be modulated or turned off for mobility or cleaning. The technology uses a very small amount of power (on the order of 20 microwatts/Newton weight held) and shows the ability to repeatably clamp to wall substrates that are heavily covered in dust or other debris.
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Implementing the Viterbi algorithm in modern digital communications systems - 1 views

  • With the consumer demand for richer content and its resultant , increasing high data bandwidth continuing to drive communications systems, coding for error control has become extraordinarily important. One way to improve the bit error rate (BER), while maintaining high data reliability, is to use an error correction technique like the Viterbi algorithm. Originally conceived by Andrew Viterbi as an error-correction scheme for noisy digital communication, the Viterbi algorithm provides an efficient method for forward error correction (FEC) that improves channel reliability. Today, it is used in many digital communications systems in applications as diverse as CDMA and GSM digital cellular, dial-up modems, satellite, deep-space communications and 802.11 wireless LANs. It is also commonly used in speech recognition, keyword spotting and computational linguistics.
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DSP options to accelerate your DSP+FPGA design - 0 views

  • Although signal processing is usually associated with digital signal processors, it is becoming increasingly evident that FPGAs are taking over as the platform of choice in the implementation of high-performance, high-precision signal processing. For many such applications, the choice generally boils down to using either a single FPGA, a FPGA with an associated DSP processor or a farm of DSP processors.
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robots.net - Thought-Controlled Computers Progressing - 0 views

  • Researchers at CMU and Intel are attempting to map and understand human brain activity well enough that individual words can be detected. Currently, giant MRI machines are being used but the future holds smaller devices that can be worn like a helmet according to Dean Pomerleau, senior researcher at Intel. The efficiency and productivity of word detection will be superior to existing technology that allows an operator to simply control a cursor. This technology will no doubt make its way into robotic telepresence applications including remote surgery and construction in dangerous environments such as the ocean and space.
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Techfocus Media :: Paradox of Pursuit - 0 views

  • Rube Goldberg couldn’t have designed a more elegant confluence of convoluted causal relationships.  Start analyzing the perplexing paradox of the FPGA synthesis market and each link of the chain reveals a bizarre force vector that eventually doubles back onto itself into an unlikely equilibrium that miraculously has held stable for a full decade despite disruptive forces of epic proportions. For over a decade now, Synplify has navigated these waters and has continued to survive and thrive through the unlikeliest of conditions.  Now in the hands of EDA giant Synopsys, the Synplify family of FPGA synthesis tools continues to evolve - with a major upgrade this fall.  When you put a digital design into an FPGA, there are two technologies that determine whether your design fits or doesn’t fit, whether it meets your timing constraints or does not, whether the power consumption will be within your limits (or those of the FPGA), or whether it fails completely, leaving your project at the mercy of major mulligans.   Those two technologies are synthesis and place-and-route. 
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IEEE Spectrum: Get on the Optical Bus - 0 views

  • IBM's light-powered links overcome the greatest speed bump in supercomputing: interconnect bandwidth
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How to achieve timing closure in large, complex FPGA designs - 0 views

  • This article features an example chapter from a new *Hot-off-the-Press* book on FPGA Design that just recently hit the streets in August 2010. This chapter is reproduced here with the kind permission of the publisher – Springer. This book -- FPGA Design: Best Practices for Team-Based Design -- describes best practices for successful FPGA design. It is the result of the author’s meetings with hundreds of customers on the challenges facing each of their FPGA design teams. By gaining an understanding into their design environments, processes, what works and what does not work, key areas of concern in implementing system designs have been identified and a recommended design methodology to overcome these challenges has been developed.
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Honda Conducts European Public Research to Perfect Human-Robot | ASIMO News - 0 views

  • A research project will be conducted this week in Linz, Austria, to discover what the ideal interaction between people and humanoid robots ought to be in the future, Honda R&D and Ars Electronica Futurelab announced today. The research, the first of its kind in Europe, will involve members of the public directly interacting with ASIMO, Honda's humanoid robot.
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How to build a Magic Mirror (Part 1) - 0 views

  • Imagine that a guest is about to depart from your house. She (or he) pauses to check her appearance in an antique-looking mirror mounted near the front door. Suddenly, the image of your guest undergoes a Matrix-like 'ripple' and is replaced with a strange face saying… …actually, we'll move on to consider what the face might say in a moment, but first let me introduce you to a few underlying concepts. Just a few days ago as I pen these words, I came across about a very cool website that describes a really cunning idea called a Magic Mirror (http://diymagicmirror.com).
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How to achieve 1 trillion floating-point operations-per-second in an FPGA - 1 views

  • Based on recent technological developments, high-performance floating-point signal processing can, for the very first time, be easily achieved using FPGAs. To date, virtually all FPGA-based signal processing has been implemented using fixed-point operations. This article describes how floating-point technology in FPGAs is not only practical today, but that the processing rates of one trillion floating-point operations per second (teraFLOPS) are feasible and can be implemented on a single FPGA die.
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DNA-assisted solution processing for high-performance thin-film transistors - 0 views

  • Single-walled carbon nanotube (SWCNT)-based thin film transistors (TFTs) could be at the core of next-generation flexible electronics – displays, electronic circuits, sensors, memory chips, and other applications that are transitioning from rigid substrates, such as silicon and glass, to flexible substrates. What's holding back commercial applications is that industrial-type manufacturing of large scale SWCNT-based nanoelectronic devices isn't practical yet because controlling the morphology of single-walled carbon nanotubes is still causing headaches for materials engineers.
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Carnegie Mellon's Incredible Robot Snake Climbs a Real Tree | Singularity Hub - 0 views

  • Carnegie Mellon has taught its robotic snake to climb trees, though one hopes it won’t start offering your spouse apples. “Uncle Sam” (presumably named for its red, white, and blue markings) is a snake robot built from modular pieces. The latest in a line of ‘modsnakes’ from Carnegie Mellon’s Biorobotics Lab, Uncle Sam can move in a variety of different ways including rolling, wiggling, and side-winding. It can also wrap itself around a pole and climb vertically, which comes in handy when scaling a tree. You have to watch this thing in action. There is something incredibly life-like, and eerie, about the way it scales the tree outdoors and then looks around with its camera ‘eye’. Projects like Uncle Sam show how life-mimicking machines could revolutionize robotics in the near future.
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Self powered parts will be electronic mainstay by 2020 - Pacemakers to power themselves... - 0 views

  • bowl and pairing off to come up with a way to create and commercialise sensors and switches that generate their own power. The idea is that the parts will make external power sources redundant - because they can convert energy from body heat, light and vibrations straight into electricity. Self powered electronics have already sporadically been used in technology like wall-mount remote control units for air conditioners, says Nikkei, but existing parts are bulky and cost a couple thousand yen a piece. 3,000 yen is about $35 - which means they're not the best bet, financially, yet.
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Secrets of the gecko foot help robot climb - 0 views

  • The science behind gecko toes holds the answer to a dry adhesive that provides an ideal grip for robot feet. Stanford mechanical engineer Mark Cutkosky is using the new material, based on the structure of a gecko foot, to keep his robots climbing.
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What really limits MOSFET performance: silicon, package, driver or circuit board? (Part... - 0 views

  • Simple mathematical analysis shows that the best answer to address this problem is to  select a CR ratio QGD/QGS1 that is less than 1. Other factors to consider for preventing C dv/dt induced turn-on include low driver-sinking impedance (<1 Ώ), a FET design with intrinsically low RG, an externally-applied G-S capacitor and Q2 packages that minimize parasitics and voltage ringing.
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Selecting resistors for preamp, amplifier and other high-end audio applications - 0 views

  • In high-end audio equipment, careful selection of resistors is one of the best ways to avoid or minimize noise and distortion in the signal path. This paper describes the noise generation in resistors manufactured using the various available resistor technologies and quantifies the noise insertion typical for each type.
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Defining system timing requirements - 0 views

  • While the topic of timing has already been raised in previous parts in this series, the discussion here will be expanded to include the execution and response time of the software functions. When discussing timing in embedded software, there are typically two types of timing requirements, rate of execution and response time. Rate of execution deals with the event-to-event timing within a software function. It can be the timing between changes in an output, time between samples of an input, or some combination of both.
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