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It is no secret that field-programmable gate arrays (FPGAs) are getting bigger and more complex all the time. The fabrication process creates smaller transistors and makes more dense chips packing more digital processing per nanometer. Engineers love to see advancement because it means they can do more with modern silicon, and many times NI LabVIEW FPGA Module technology helps by abstracting the complexity to a higher level so that engineers can more smoothly take advantage of these improvements.  Unfortunately, there is one issue with FPGAs that continues to be a time sink and only gets worse with denser FPGAs: compilation time.

Based on recent technological developments, high-performance floating-point signal processing can, for the very first time, be easily achieved using FPGAs. To date, virtually all FPGA-based signal processing has been implemented using fixed-point operations. This article describes how floating-point technology in FPGAs is not only practical today, but that the processing rates of one trillion floating-point operations per second (teraFLOPS) are feasible and can be implemented on a single FPGA die.

Ever since graphene was first produced in a lab at the University of Manchester in 2004, researchers around the world have been fascinated with its potential in electronics applications. Graphene possessed all the benefits of carbon nanotubes (CNTs), namely its charged-carrier mobility, but it didn’t have any of the down sides, such as CNTs’ need for different processing techniques than silicon and the intrinsic difficulty of creating interconnects for CNTs. But all was not easy for applying graphene to electronics applications. One of the fundamental problems for graphene was its lack of a band gap, which left it with a very low on-off ratio measured at about 10 as compared to in the 100s for silicon. Now this fundamental hurdle has been overcome. Based on research led by Phaedon Avouris at IBM’s IBM T.J. Watson Research Center, Yorktown Heights, New York, IBM is reporting that they have created a significant band gap in graphene.

4 January 2010—Though flexible devices such as roll-up displays have been promised for several years, their commercialization has been stalled by a missing ingredient: a flexible form of flash memory. But researchers at the University of Tokyo have recently developed an organic, floating-gate nonvolatile memory that behaves like flash memory, which may solve that problem. While silicon-based flash memory is fine for the mass data storage found in cellphones, digital music players, and thumb drives, fabricating it requires high processing temperatures, thus ruling out its production on flexible substrates like plastic. Organic semiconductors, however, can be processed at temperatures well below the melting point of most plastics. What's more, "the cost of flash memory is too high to use in applications that require large arrays of memory," says Tsuyoshi Sekitani, an assistant professor in the University of Tokyo's department of electrical and electronic engineering and one of the researchers who developed the new memory. "But we can print our organic memory on flexible substrates and over large areas using inkjet printers. So costs will be low."

Icosatetraped does, in fact, mean “twenty-four legged.” I’m not sure how to inject “soft” into that word (icostatetrasquishaped?), but this robot does have 24 soft legs. Or rather, 8 legs are soft (and moving) at any one time, while the other 16 are pressurized to carry the weight of the bot. It can move at about 1 meter per minute, which isn’t especially fast, but who cares, look at all of those little legs go! Made from plastic medical tubing, particle board, a bunch of solenoids, a Mac Mini, and some 24 volt rotary vane compressors salvaged from Gulf War nerve gas detecting equipment, this is about as DIY as it gets, and it’s awesome.

Mahru-Z is the robotic maid that can make breakfast!. Given certain voice commands the robot can perform functions such as working a microwave, delivering toast, and other tasks such as washing clothes. The robots can see with stereoscopic vision and can identify what objects are and even decide what jobs needs to be done with the objects. In the video, one robot appears to be tethered and the other is not making me wonder if they are really self contained. Also, one is wearing a dress and the other not, so are they both maids or is one a butler? Shouldn't they just call them robotic servants or is that redundant? Regardless, although not apparently sentient, these do appear to be advanced robots. I only wonder if they washed their hands before and after handling the food?

The IEEE has launched a new Web site that consolidates information about smart electric grids from it various societies. The portal is one of many activities from an IEEE smart grid initiative coordinating the organization's work on the transition to digital, networked power systems and services. The smart grid is "so interdisciplinary," said Wanda Reder, chair of the IEEE Smart Grid Task Force and former president of the IEEE Power & Energy Society. "We have the gamut covered in technical interests, but we needed a way to facilitate communications between our many entities to link information on all the conferences, papers and standards we have in this area," she added.

A product can be of low quality for several reasons, such as it was shoddily manufactured, its components were improperly designed, its architecture was poorly conceived, and the product's requirements were poorly understood. Quality must be designed in. You can't test out enough bugs to deliver a high-quality product. The quality assurance (QA) process is vital for the delivery of a satisfactory system. In this last part in this series, we will concentrate on portions of the methodology particularly aimed at improving the quality of the resulting system. The software testing techniques described earlier in this series constitute one component of quality assurance, but the pursuit of quality extends throughout the design flow. For example, settling on the proper requirements and specification cannot be overlooked as an important determinant of quality. If the system is too difficult to design, it will probably be difficult to keep it working properly.

A new chink has been found in the cryptographic armor that protects bank transactions, credit-card payments, and other secure Internet traffic. And although programmers have devised a patch for it, clever hackers might still be able to break through. The hack, presented in March at a computer security conference in Dresden, Germany, involves lowering the input voltage on a computer’s cryptography chip set and collecting the errors that leak out when the power-starved chips try and (sometimes) fail to encode messages. Crooks would then use those errors to reconstruct the secret key on which the encryption is based. More important, say the hack’s creators, the same attack could also be performed from afar on stressed systems, such as computer motherboards that run too hot or Web servers that run too fast.

Have you ever written code that behaves correctly under a simulator only to have intermittent failures in the field? Or maybe your code no longer functions properly when you compile with a newer version of your tool chain. You review your test bench and verify 100 percent complete test coverage and that all tests have passed with no errors--yet the problem stubbornly remains. While designers understandably place great emphasis on coding and simulation, they often have only a nodding acquaintance with the internal workings of the silicon within an FPGA. As a result, incorrect logic synthesis and timing problems, rather than logic errors, are the cause of most logic failures. But writing FPGA code that creates predictable, reliable logic is simple if designers take the right steps. In FPGA design, logic synthesis and related timing closure occur during compilation. And many things, including I/O cell structure, asynchronous logic and timing constraints, can have a big impact on the compilation process, varying results with each pass through the tool chain. Let's take a closer look at ways to eliminate these variances to better and more quickly achieve timing closure.

Let’s face it. Most of the gear you use at work or play has multicore processors in it. Your laptop has them (the CPU itself has two cores, and the dedicated graphics processor has many more). That game console in the living room has still more, and even a high-end smartphone typically has a CPU and graphics core on a single chip. Out of sight but definitely not out of mind–particularly if they cease working–are the servers and high-throughput network routers, all which have numerous multicore processors in them. The multiple cores in these devices work in concert to provide quick responses to user queries or to manage the smooth flow of data throughout the office.

A transistor that emits light and is made from organic materials could lead to cheaper digital displays and fast-switching light sources on computer chips, according to the researchers who built it. Small displays made from diodes of the same type of materials (organic light-emitting diodes, or OLEDs) are already in commercial production, but the transistor design could improve on those and lead to applications where OLEDs can’t go. The new organic light-emitting transistor (OLET) is much more efficient than previous designs. It has an external quantum efficiency—a key measure of how much light comes out per charge carrier pumped in—of 5 percent. An OLED based on the same material has a quantum efficiency of only 2 percent. Previous OLET designs had an efficiency of only 0.6 percent.