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Tilikum the killer whale (Orcinus orca) made news recently in the tragic death of his Sea World trainer, Dawn Brancheau. Tilikum pulled Brancheau into the water when he grabbed her floating ponytail — much like a cat might grab yarn attached to a stick. Complex play behavior is a sign of intelligence, but unfortunately little is known of the circuitry of even a cat’s brain, much less the massive brain of an orca — roughly four times the size of a human brain. See Also The Race to Reverse Engineer the Human Brain Ray Kurzweil Interview Brain on a Chip MIT neuroscientists are developing computerized techniques to map the millions of miles of neuronal circuits in the brain that may one day shed some light on the differences between Homo sapiens sapiens and other species, and will likely clarify how those neurons give rise to intelligence, personality, and memory. Developing connectomes (maps of neurons and synapses) may have just as much impact as sequencing the human genome. Here’s a video showing 3D rotating nodes and edges in a small connectome:

The MATLAB team at MathWorks tested performance scaling of the backslash ("\") matrix division operator to solve for x in the equation A*x = b. In their testing, matrix A occupies far more memory (290 GB) than is available in a single high-end desktop machine—typically a quad core processor with 4-8 GB of RAM, supplying approximately 20 Gigaflops. Therefore, they spread the calculation across machines. In order to solve linear systems of equations they need to be able to access all of the elements of the array even when the array is spread across multiple machines. This problem requires significant amounts of network communication, memory access, and CPU power. They scaled up to a cluster in EC2, giving them the ability to work with larger arrays and to perform calculations at up to 1.3 Teraflops, a 60X improvement. They were able to do this without making any changes to the application code. Here's a graph showing the near-linear scalability of an EC2 cluster across a range of matrix sizes with corresponding increases in cluster size for MATLAB's parallel backslash operator:

Events such as natural disasters, military actions, and public safety threats have led to an increased need for robust robots — especially ones that can travel across complex terrain in any dimension. The ability to scale vertical building surfaces or other structures offers unique capabilities in military applications such as urban reconnaissance, sensor deployment, and setting up urban network nodes. SRI's novel clamping technology, called compliant electroadhesion, has enabled the first application of this technology to wall-climbing robots that can help with these situations.  As the name implies, electroadhesion is an electrically controllable adhesion technology. It involves inducing electrostatic charges on a wall substrate using a power supply connected to compliant pads situated on the moving robot. SRI has demonstrated robust clamping to common building materials including glass, wood, metal, concrete, etc. with clamping pressures in the range of 0.5 to 1.5 N per square cm of clamp (0.8 to 2.3 pounds per square inch). The technology works on conductive and non-conductive substrates, smooth or rough materials, and through dust and debris. Unlike conventional adhesives or dry adhesives, the electroadhesion can be modulated or turned off for mobility or cleaning. The technology uses a very small amount of power (on the order of 20 microwatts/Newton weight held) and shows the ability to repeatably clamp to wall substrates that are heavily covered in dust or other debris.

The IEEE has launched a new Web site that consolidates information about smart electric grids from it various societies. The portal is one of many activities from an IEEE smart grid initiative coordinating the organization's work on the transition to digital, networked power systems and services. The smart grid is "so interdisciplinary," said Wanda Reder, chair of the IEEE Smart Grid Task Force and former president of the IEEE Power & Energy Society. "We have the gamut covered in technical interests, but we needed a way to facilitate communications between our many entities to link information on all the conferences, papers and standards we have in this area," she added.

While the new multicore system on chip (SoC) signal-processing architecture announced by Texas Instruments this week at Mobile World Congress hits all the right notes with respect to what's needed in next-generation basestation designs, it rings a bit hollow given how sketchy the architectural details remain when contrasted with more 'real' announcements from the likes of Freescale. For sure, the requirements of next-generation basestations will push all architectures to their limits and beyond. Balancing lower power and lower cost with increasingly parallel, math-intensive processing to meet multiuser demands for high-data-rate data in 3GPP Long Term Evolution (LTE) Release 8 all-IP networks is not going to be easy, especially with the introduction of MIMO, beam forming, OFDMA and many other enhancements engineered to maximize spectral efficiency.

Walking, swallowing, respiration and many other key functions in humans and other animals are controlled by Central Pattern Generators (CPGs). In essence, CPGs are small, autonomous neural networks that produce rhythmic outputs, usually found in animal's spinal cords rather than their brains. Their relative simplicity and obvious success in biological systems has led to some success in using CPGs in robotics. However, current systems are restricted to very simple CPGs (e.g., restricted to a single walking gait). A recent breakthrough at the BCCN at the University of Göttingen, Germany has now allowed to achieve 11 basic behavioral patterns (various gaits, orienting, taxis, self-protection) from a single CPG, closing in on the 10–20 different basic behavioral patterns found in a typical cockroach. The trick: Work with a chaotic, rather than a stable periodic CPG regime. For more on CPGs, listen to the latest episode of the Robots podcast on Chaos Control, which interviews Poramate Manoonpong, one of the lead researchers in Göttingen, and Alex Pitti from the University of Tokyo who uses chaos controllers that can synchronize to the dynamics of the body they are controlling.

Predicting trends is difficult even by the most connected industry experts, but one trend that's easy to spot is the widespread acceptance of multicore SoC. This is happening for a number of reasons. First, it's been years since the workstation first adopted the multicore processor architecture to solve such issues as increasing performance and power concerns. While the adoption rate in workstations is now saturated and is fully supported by General Purpose OSs (GPOS), the embedded world is just now looking at ways to adopt multicore architecture. Second, several SoC vendors have been providing multicore solutions including Cavium, Freescale, MIPS, and ARM; but up until now, these solutions have been limited to networking and used for performance enhancements rather than for low power. The rest of the embedded industry has had limited hardware options available as low-power design is a driving factor. While the ARM 11 MPCore was ahead of its time, the Cortex-A9 MPCore design is ready for primetime and is gaining acceptance in the embedded marketplace. As a result, SoC vendors have adopted the Cortex-A9 MPCore hardware as a basis for their next generation designs. Over a year ago, Texas Instruments pre-announced their next-generation OMAP designs in the OMAP 4 with a dual-core Cortex-A9 MPCore, scheduled for production in the second-half of 2010. ST Microsystems has pre-announced their next generation consumer devices which will be based on the Cortex A9 MPCore.

We are entering the robotic age. All over the world, we see research projects and companies working on realistic, market driven robots, with impressive realizations ranging from intelligent vacuum cleaners to humanoid robots.   This is a very exciting time and some people see in the current situation many common points with the early days of the computer industry. However, like PCs in the early 80's, today's robots are still incompatible in term of software. There is yet no standard way to reuse one component from one robot to the other, which is needed to have a real software industry bootstraping. And most attempts have been failing to provide tools genuinely adapted to the complex need of robot programming.   Here at Gostai, we believe that the industry needs a powerful robotics software platform, ready to face the challenges of Artificial Intelligence and autonomous robots programming.

A common requirement in digital-dominated mixed-signal verification is the need for purely event-driven models that imitate Spice or AMS blocks at low fidelity but high speed. Resolved record types are commonly used for this modeling style in VHDL-based flows. Unfortunately, SystemVerilog defines only one resolved net type, the logic type. A second, non-standard net type, wreal, has been borrowed from Verilog-AMS and, with proprietary extensions, added to some implementations of SystemVerilog. wreal is a single real value with a small, fixed set of resolution functions. It solves only a subset of the problems commonly encountered in event-driven analog modeling. In contrast, the ADMS_signals approach is completely general and extensible while still conforming strictly to the IEEE SystemVerilog standard. The stored data type can be any type that is legal in SystemVerilog, including arrays and structs (nested to arbitrary depth) and even class instances (objects). The resolution function is a user-supplied SystemVerilog function. Different networks in the same design hierarchy may be given distinct stored type and resolution function.

Let’s face it. Most of the gear you use at work or play has multicore processors in it. Your laptop has them (the CPU itself has two cores, and the dedicated graphics processor has many more). That game console in the living room has still more, and even a high-end smartphone typically has a CPU and graphics core on a single chip. Out of sight but definitely not out of mind–particularly if they cease working–are the servers and high-throughput network routers, all which have numerous multicore processors in them. The multiple cores in these devices work in concert to provide quick responses to user queries or to manage the smooth flow of data throughout the office.