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Multisim 11 is the latest version of its circuit simulation software, with specialized editions for both hands-on learning and professional circuit design. The easy-to-use Multisim software delivers a graphical approach that abstracts the complexities of traditional circuit simulation, helping educators, students and engineers employ advanced circuit analysis technology. The academic edition of Multisim 11 incorporates specialized teaching features and is complemented by circuits textbooks and courseware. This integrated system helps educators engage students and reinforce circuit theory with an interactive, hands-on approach to investigating circuit behavior. Multisim 11 Professional helps engineers optimize circuit designs, minimize errors and reduce prototype iterations. When combined with the new NI Ultiboard 11 layout and routing software, Multisim provides engineers a cost-effective, end-to-end prototyping platform. Its integration with NI LabVIEW measurement software also helps engineers define custom analyses to improve design validation…

There are severe flaws within the Harmonic-Balance and SPICE programs now widely used. Mentioned as far back as within an abstract of Session WSO at the 2008 IEEE International Microwave Symposium: "Even though nonlinear circuit-analysis software has been in use for many years, users still have difficulty obtaining valid results with existing methods.  Recognized problems include poor accuracy, convergence difficulties, long simulation times, and unstable results (i.e., results that vary greatly with minor changes in parameters).  These problems are encountered in both harmonic-balance and time-domain simulations."

Harmonic balance (hB) analysis is a method used to calculate the nonlinear, steady-state frequency response of electrical circuits. It is extremely well-suited for designs in which transient simulation methods prove acceptable, such as dispersive transmission lines in which circuit time constants are large compared to the period of the simulation frequency, as well as for circuits that have a large number of reactive components. In particular, harmonic balance analysis works extremely well for microwave circuits that are excited with sinusoidal signals, such as mixers and power amplifiers...

Scientists have great expectations that nanotechnologies will bring them closer to the goal of creating computer systems that can simulate and emulate the brain's abilities for sensation, perception, action, interaction and cognition while rivaling its low power consumption and compact size. DARPA for instance, the U.S. military's research outfit known for projects that are pushing the envelope on what is technologically possible, has a program called SyNAPSE that is trying to develop electronic neuromorphic machine technology that scales to biological levels. Started in late 2008 and funded with $4.9 million, the goal of the initial phase of the SyNAPSE project is to "develop nanometer scale electronic synaptic components capable of adapting the connection strength between two neurons in a manner analogous to that seen in biological systems, as well as, simulate the utility of these synaptic components in core microcircuits that support the overall system architecture."

Have you ever written code that behaves correctly under a simulator only to have intermittent failures in the field? Or maybe your code no longer functions properly when you compile with a newer version of your tool chain. You review your test bench and verify 100 percent complete test coverage and that all tests have passed with no errors--yet the problem stubbornly remains. While designers understandably place great emphasis on coding and simulation, they often have only a nodding acquaintance with the internal workings of the silicon within an FPGA. As a result, incorrect logic synthesis and timing problems, rather than logic errors, are the cause of most logic failures. But writing FPGA code that creates predictable, reliable logic is simple if designers take the right steps. In FPGA design, logic synthesis and related timing closure occur during compilation. And many things, including I/O cell structure, asynchronous logic and timing constraints, can have a big impact on the compilation process, varying results with each pass through the tool chain. Let's take a closer look at ways to eliminate these variances to better and more quickly achieve timing closure.

When Pantelis Georgiou and his fellow biomedical engineers at Imperial College London decided to design an intelligent insulin pump for diabetes patients, they started at the source. "We asked ourselves, what does a pancreas do to control blood glucose?" Georgiou recalls. The answer is pretty well known: The organ relies primarily on two populations of cells—beta cells, to secrete insulin when blood glucose is high, and alpha cells, which release a hormone called glucagon when glucose levels are low. "We simulated them both in microchip form," Georgiou says. This biomimetic approach diverges from today's dominant method of delivering only insulin using a relatively simple control system.

You just built a breadboard of your expert design. You did all the simulations needed before going to layout, and reviewed the manufacturer's suggested techniques for a good thermal design for the particular package chosen. You even did your due diligence in going through the initial thermal analysis equations on paper to be sure not to exceed IC junction temperatures with a comfortable margin. But wait, you turn on the power and the IC is pretty hot to the touch. You are uncomfortable with this (not to mention the concern of your thermal experts and reliability people). Now what do you do?