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Over 100 years ago, when Henry Ford was conceiving a mass produced automobile, it was in an environment where cars were specified and built to order one by one. Each car was 'hand crafted' with the care and precision warranted by a fledgling auto market where society's elite were the only ones who could afford such a revolutionary contraption.

This API provides users with a standard FPGA communication interface from C++ code. It is intended to encourage more widespread adoption of FPGAs and reconfigurable computing platforms—particularly among Windows application developers

FPGAs referenced in this article have complex dedicated I/O circuitries that are primarily designed to support EMIF. The ALTMEMPHY megafunction is designed to support the most common memory standards, such as the DDR , DDR2 SDRAM, and QDR II+/QDR II SRAM (in a burst length of 4) interfaces. Other external memory standards such as Mobile DDR, QDR II+/QDR II SRAM (in burst length of 2), or customized DDR and DDR 2 SDRAM external memory standards are not supported. Instead, the ALTDLL and ALTDQ_DQS megafunctions are used to access the FPGA architecture and build a custom EMIF.

Lattice Diamond design software offers leading-edge design and implementation tools optimized for cost sensitive, low-power Lattice FPGA architectures. Diamond is the next generation replacement for ispLEVER featuring design exploration, ease of use, improved design flow, and numerous other enhancements. The combination of new and enhanced features allows users to complete designs faster, easier, and with better results than ever before.

In addition to voice connectivity, digital cellular wireless networks such as GSM and its enhancement, GSM-EDGE, can now provide increased data speeds up to a (theoretical) limit of 384ﾠKbps. Third generation mobile networks, such as CDMA2000 and WCDMA or UMTS (Universal Mobile Telecommunications Standards) and TD-SCDMA (China only) are currently being deployed worldwide. These systems offer services such as video streaming, Internet browsing and, by using a technique called High Speed Packet Access (HSPA), they can in theory deliver downlink speeds up to 14,4 Mbps.

Using a programmable device to expand the capabilities of an embedded system, designers can reduce power consumption at the same time By Rahul V. Shah and Vishesh Agrawal

How's this for a wedge issue on a slow news week? When Xilinx announced earlier this year that it was changing one of its foundry suppliers from UMC to TSMC for the 28-nm node, it seemed like a blow to differentiation—at least from a process technology standpoint—between Xilinx and Altera, which has been using TSMC for years. But while Xilinx chose to go with TSMC's high-performance/low power process, Altera said this week it is going with TSMC's high-performance process. Altera maintains that customers in the high end communications equipment market are much more concerned about performance than power. Luanne Schirrmeister, senior director of product marketing at Altera, put it this way: "In communications infrastructure, nothing is battery powered. Everything is plugged into a wall."

NI LabVIEW Robotics is a software package that provides a complete suite of tools to help you rapidly design sophisticated robotics systems for medical, agricultural, automotive, research, and military applications. The LabVIEW Robotics Software Bundle includes all of the functionality you need, from multicore real-time and FPGA design capabilities to vision, motion, control design, and simulation. Watch an introduction and demonstration of LabVIEW Robotics.

A new triple-rate (3G/HD/SD) audio/video clock generator from National Semiconductor Corp., eliminates the need for external clock conditioning in professional and broadcast video equipment. The LMH1983 produces all the major video and audio reference clocks required for a broad range of applications. The highly integrated LMH1983 also provides the industry’s lowest-output jitter (40 ps peak-to-peak), enabling Society of Motion Picture and Television Engineers (SMPTE) compliance using field-programmable gate array (FPGA) SerDes transceivers.

With the introduction of the WEBENCH Online Design Environment in 1999, National Semiconductor made it possible for design engineers to create a reliable power supply circuit over the internet in minutes. The user specified the circuit performance and the WEBENCH Toolset delivered. Today, WEBENCH Designer creates and presents all of the possible power, lighting, or sensing circuits that meet a design requirement in seconds. This enables the user to make value based comparisons at a system and supply chain level before a design is committed. This expert analysis is not possible anywhere else.