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A transistor that emits light and is made from organic materials could lead to cheaper digital displays and fast-switching light sources on computer chips, according to the researchers who built it. Small displays made from diodes of the same type of materials (organic light-emitting diodes, or OLEDs) are already in commercial production, but the transistor design could improve on those and lead to applications where OLEDs can’t go. The new organic light-emitting transistor (OLET) is much more efficient than previous designs. It has an external quantum efficiency—a key measure of how much light comes out per charge carrier pumped in—of 5 percent. An OLED based on the same material has a quantum efficiency of only 2 percent. Previous OLET designs had an efficiency of only 0.6 percent.

Tiny semiconductor dots could lead to a new type of circuit based on magnetism rather than current flow. At least that’s the hope of researchers who’ve made the dots and are hoping to build them into a workable device. ”We want to make it into a so-called nonvolatile transistor,” says Kang Wang, head of the Device Research Laboratory at the University of California, Los Angeles. Such a ”spintronic” transistor would retain its logic state in the absence of current and require less power to switch a bit, reducing the electrical power required by a computer chip by as much as 99 percent. Wang’s research, supported in part by Intel, was published in March in the online version of Nature Materials. Where electronic transistors rely on the presence or absence of current to register the ones and zeros of digital logic, spintronic transistors depend on ”spin,” a quantum characteristic of the electron. Picture the electron as a rotating globe. When the north pole is pointing upward, that’s spin up; when pointing the other way, it’s spin down. When the spins of most electrons are aligned, the material is magnetic. When their spins are random, the material isn’t. An applied current can align or randomize the spins, allowing for spin-based switches.

(Nanowerk News) While the laws of physics weren’t made to be broken, sometimes they need revision. A major current law has been rewritten thanks to the three-port transistor laser, developed by Milton Feng and Nick Holonyak Jr. at the University of Illinois.

A test circuit built with nanowires of silicon could point the way to much smaller transistors, say the IBM researchers who created it. Researchers from IBM’s Thomas J. Watson Research Center announced today at the annual Symposium on VLSI Technology, in Honolulu, that they have built a ring oscillator out of field-effect transistors (FETs) based on nanowires with diameters as small as 3 nanometers. The oscillator—is composed of 25 inverters using negative- and positive-channel FETs. The device, which demonstrated a delay of just 10 picoseconds per stage, shows that engineers can build a working circuit from transistors with much shorter channel lengths than today’s devices. Current flows through an FET’s channel under the control of the device’s gate. Scaling down the channel length will be critical if the dimensions of circuits on silicon chips are to continue to shrink, says Jeffrey Sleight, a senior technical staff member at IBM.

Single-walled carbon nanotube (SWCNT)-based thin film transistors (TFTs) could be at the core of next-generation flexible electronics – displays, electronic circuits, sensors, memory chips, and other applications that are transitioning from rigid substrates, such as silicon and glass, to flexible substrates. What's holding back commercial applications is that industrial-type manufacturing of large scale SWCNT-based nanoelectronic devices isn't practical yet because controlling the morphology of single-walled carbon nanotubes is still causing headaches for materials engineers.

Three-dimensional microchip designs are making their way to market to help pack more transistors on a chip as traditional scaling slows down. By stacking logic chips on top of one another other or combining logic chips with memory or RF with logic, chipmakers hope to sidestep Moore's Law, increasing the functionality of smartphones and other gadgets not by shrinking a chip's transistors but the distance between them. "There's a big demand for smaller packages in the consumer market, especially for the footprint of a mobile phone, or for improving the memory bandwidth of your GPU," says Pol Marchal, a principal scientist of 3-D integration at European microelectronics R&D center Imec. On 9 February, at the IEEE International Solid-State Circuits Conference (ISSCC), in San Francisco, Imec engineers presented some key design challenges facing 3-D chips made by stacking layers of silicon circuits using vertical copper interconnects called through-silicon vias (TSVs). These design constraints will have to be dealt with before TSVs can be widely used in advanced microchip architectures, Marchal says.

It is no secret that field-programmable gate arrays (FPGAs) are getting bigger and more complex all the time. The fabrication process creates smaller transistors and makes more dense chips packing more digital processing per nanometer. Engineers love to see advancement because it means they can do more with modern silicon, and many times NI LabVIEW FPGA Module technology helps by abstracting the complexity to a higher level so that engineers can more smoothly take advantage of these improvements.  Unfortunately, there is one issue with FPGAs that continues to be a time sink and only gets worse with denser FPGAs: compilation time.

March has seen two significant announcements from FPGA start-ups with innovative architectures: Tabula, with their time-domain-multiplexed architecture, and TierLogic, implementing their routing switches in a layer of thin-film transistors. Both approaches promise to significantly reduce the die size and cost of high-end FPGAs. But before these announcements broke, a relatively unnoticed paper at February's International Symposium on FPGAs described what may be the most radical technology of them all: FPGAs using electromechanical relays. No, this is not an early April Fool's joke, nor is it one of those "let's see if anyone will publish this one" academic exercises. The paper presented work by professors and students at the Stanford University departments of electrical engineering and computer science, and researchers at Altera Corp. The work was supported in part by DARPA funding.

The moving parts of micromechanical machines tend to seize up under the forces of sticking and friction that engineers call stiction. The problem yields to solid lubricants, notably graphite (sheets of carbon atoms called graphene stacked in layers), although for a long time no one understood exactly why this happens. Now nanotechnology researchers, led by Professor Robert Carpick at the University of Pennsylvania and Professor James Hone at Columbia University, in New York City, have shown that how effective the lubrication is depends on the number of layers of graphene in the graphite. In particular, more layers means better lubrication. Because the same relationship between layers and lubrication occurs in thin sheets of molybdenum disulfide, niobium diselenide, and boron nitride—materials of widely differing properties—the workers conclude that this behavior is a fundamental aspect of friction. They expect that the discovery will lead to better lubrication of tiny moving parts. The researchers published details of their experiments in a recent issue of Science.

Sony Corp. has developed a highly flexible OLED display that can be rolled around a pencil and continue to operate. The 4.1-inch diagonal isplay is 80-microns thick and offers 432 by 240 by RGB pixels resolution at 121 pixels per inch. It is an organic LED full color display driven by an organic thin-film transistor matrix.