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bowl and pairing off to come up with a way to create and commercialise sensors and switches that generate their own power. The idea is that the parts will make external power sources redundant - because they can convert energy from body heat, light and vibrations straight into electricity. Self powered electronics have already sporadically been used in technology like wall-mount remote control units for air conditioners, says Nikkei, but existing parts are bulky and cost a couple thousand yen a piece. 3,000 yen is about $35 - which means they're not the best bet, financially, yet.

Events such as natural disasters, military actions, and public safety threats have led to an increased need for robust robots — especially ones that can travel across complex terrain in any dimension. The ability to scale vertical building surfaces or other structures offers unique capabilities in military applications such as urban reconnaissance, sensor deployment, and setting up urban network nodes. SRI's novel clamping technology, called compliant electroadhesion, has enabled the first application of this technology to wall-climbing robots that can help with these situations.  As the name implies, electroadhesion is an electrically controllable adhesion technology. It involves inducing electrostatic charges on a wall substrate using a power supply connected to compliant pads situated on the moving robot. SRI has demonstrated robust clamping to common building materials including glass, wood, metal, concrete, etc. with clamping pressures in the range of 0.5 to 1.5 N per square cm of clamp (0.8 to 2.3 pounds per square inch). The technology works on conductive and non-conductive substrates, smooth or rough materials, and through dust and debris. Unlike conventional adhesives or dry adhesives, the electroadhesion can be modulated or turned off for mobility or cleaning. The technology uses a very small amount of power (on the order of 20 microwatts/Newton weight held) and shows the ability to repeatably clamp to wall substrates that are heavily covered in dust or other debris.

With the consumer demand for richer content and its resultant , increasing high data bandwidth continuing to drive communications systems, coding for error control has become extraordinarily important. One way to improve the bit error rate (BER), while maintaining high data reliability, is to use an error correction technique like the Viterbi algorithm. Originally conceived by Andrew Viterbi as an error-correction scheme for noisy digital communication, the Viterbi algorithm provides an efficient method for forward error correction (FEC) that improves channel reliability. Today, it is used in many digital communications systems in applications as diverse as CDMA and GSM digital cellular, dial-up modems, satellite, deep-space communications and 802.11 wireless LANs. It is also commonly used in speech recognition, keyword spotting and computational linguistics.

The MiniZeni series from Sharp radiates high efficiency, deliver high color rendering index (CRI) values of up to 87 and boast a long service life whilst measuring only 15x12x1.6mm. The six new models of the MiniZeni series are characterised by four special features: they have compact outer dimensions and are extremely flat, economical and bright.

INTEL HELD AN EVENT in London last night to talk up its Core i3, i5 and i7 processors. To highlight the ceaseless march of technology and Chipzilla's own adherence to its beloved Moore's Law, the company was showcasing technology from the last 20 years as well as having a few demos about things we may expect to see in the future. Among these was this demonstration about the sorts of applications, such as advanced 3D rendering, that become feasible when a single processor can have 48 or more cores. µ

Within the next three years, the U.S. military will test the feasibility of sending a quadruped robot out into the field as a trusty pack mule to carry supplies for its troops, wherever they go. If the testing goes well for Boston Dynamics's Legged Squad Support System (LS3), company founder Marc Raibert will have come a long way from the one-legged hopping robots he pioneered in the 1980s. Actually Raibert has already come a long way, to the point where the U.S. Defense Advanced Research Projects Agency's (DARPA) Tactical Technology Office and the U.S. Marine Corps awarded his company a 30-month, $32-million contract last week to deliver a prototype LS3. This would be the first step in fulfilling the military's call for an autonomous, legged robot that can carry up to 181 kilograms of supplies for at least 32 kilometers without refueling.

At three separate industry events last week, engineers said they are gearing up to deliver in 2011 chips that can handle serial data streams running at 25 Gbits/second to drive next-generation 100 and 400 Gbit/second networks. But they say it's still a mystery how—or if—they can deliver follow-on components for the terabit networks today's Internet data centers are already demanding. The kinds of jobs required to run today's Web 2.0 services such as Google and Facebook can completely overwhelm current 10 Gbit/s Ethernet links in the warehouse-sized data centers those companies use. Such data centers could use hundreds of 100 Gbit/s Ethernet links today, although standards for such networks are still being completed.

DSP core licensor Ceva Inc. is due to unveil a software-programmable multimedia video processor architecture at the Mobile World Congress in Barcelona next week. The multicore architecture, called MM3000, which comes complete with C compilers, power management provision and an RTOS/multithreading scheduler is intended to be able to process any and all video codecs up to the highest resolutions and frame rates currently available as well as future codecs for things like 3-D video.

Not so long ago, artists routinely made their own paints using all sorts of odd ingredients: clay, linseed oil, ground-up insects—whatever worked. It was a crude and rather ad hoc process, but the results were used to create some of the greatest paintings in the world. Today I and other scientists are developing our own special paints. We’re not trying to compete with Vermeer or Gauguin, though. We hope to create masterpieces of a more technical nature: optoelectronic components that will make for better photovoltaic cells, imaging sensors, and optical communications equipment. And we’re not mixing and matching ingredients quite so haphazardly. Instead, we’re using our blossoming understanding of the world of nanomaterials to design the constituents of our paints at the molecular level.

4 January 2010—Though flexible devices such as roll-up displays have been promised for several years, their commercialization has been stalled by a missing ingredient: a flexible form of flash memory. But researchers at the University of Tokyo have recently developed an organic, floating-gate nonvolatile memory that behaves like flash memory, which may solve that problem. While silicon-based flash memory is fine for the mass data storage found in cellphones, digital music players, and thumb drives, fabricating it requires high processing temperatures, thus ruling out its production on flexible substrates like plastic. Organic semiconductors, however, can be processed at temperatures well below the melting point of most plastics. What's more, "the cost of flash memory is too high to use in applications that require large arrays of memory," says Tsuyoshi Sekitani, an assistant professor in the University of Tokyo's department of electrical and electronic engineering and one of the researchers who developed the new memory. "But we can print our organic memory on flexible substrates and over large areas using inkjet printers. So costs will be low."

The consumer handheld market is growing by leaps and bounds. With more processing power and increased support for more applications, portable products are cross-pollinating with traditional computing systems even as the product life cycle has decreased considerably in this market segment. As a result, especially in this era of economic slowdown, it is imperative that new products meet the time-to-market window to gain maximum acceptance. A decrease in product life cycles requires a reduced development cycle and an increased emphasis on reusability and reprogrammability. The emerging handheld market is also seeing interesting trends in which each individual device in a family has lower volumes but there is more customization across the series of devices, effectively upping the total unit volumes. The key challenge then becomes how to develop a system that is widely reusable and also customizable. These requirements have led designers increasingly to turn to the FPGA for handheld-product development. The FPGA has become more powerful and feature-rich, while gate counts, area and frequency have increased. FPGA development and turnaround cycles are considerably shorter than those of custom ASICs, and the added advantage of reprogrammability can make the FPGA a more compelling solution for handheld embedded systems.

The race to create tiny wireless sensors that could monitor anything from pressure in the eyes and brain to the stability of bridges appears to be heating up. Earlier this month, IEEE Spectrum reported on two approaches to creating an almost-indefinitely-running sensor using piezoelectric systems to convert tiny vibrations into power. Now, another team from the University of Michigan has created an alternative approach that uses solar power to keep the sensor running autonomously for many years.

Predicting trends is difficult even by the most connected industry experts, but one trend that's easy to spot is the widespread acceptance of multicore SoC. This is happening for a number of reasons. First, it's been years since the workstation first adopted the multicore processor architecture to solve such issues as increasing performance and power concerns. While the adoption rate in workstations is now saturated and is fully supported by General Purpose OSs (GPOS), the embedded world is just now looking at ways to adopt multicore architecture. Second, several SoC vendors have been providing multicore solutions including Cavium, Freescale, MIPS, and ARM; but up until now, these solutions have been limited to networking and used for performance enhancements rather than for low power. The rest of the embedded industry has had limited hardware options available as low-power design is a driving factor. While the ARM 11 MPCore was ahead of its time, the Cortex-A9 MPCore design is ready for primetime and is gaining acceptance in the embedded marketplace. As a result, SoC vendors have adopted the Cortex-A9 MPCore hardware as a basis for their next generation designs. Over a year ago, Texas Instruments pre-announced their next-generation OMAP designs in the OMAP 4 with a dual-core Cortex-A9 MPCore, scheduled for production in the second-half of 2010. ST Microsystems has pre-announced their next generation consumer devices which will be based on the Cortex A9 MPCore.

ON Semiconductor has expanded its multiplexer product line with devices that are designed to function at high input rates/clock frequencies. The NB6VQ572M, NB6LQ572, NB7L572, NB6L572M, NB7LQ572, NB6LQ572M, NB7VQ58M and NB7V58M mux/fanout devices are targeted at SONET, Gigabit Ethernet, Fiber Channel, backplane and other clock/data distribution applications. The NB6VQ572M and NB6LQ572M differential 4:1 clock/data input multiplexers with 1:2 current mode logic (CML) clock/data fanout buffers operate at up to 6 GHz/8 Gbps from a 1.8 V, 2.5 V or 3.3 V power supply. The new devices have a data dependent jitter of <10 ps and random clock jitter of less than 0.8 ps RMS.

March has seen two significant announcements from FPGA start-ups with innovative architectures: Tabula, with their time-domain-multiplexed architecture, and TierLogic, implementing their routing switches in a layer of thin-film transistors. Both approaches promise to significantly reduce the die size and cost of high-end FPGAs. But before these announcements broke, a relatively unnoticed paper at February's International Symposium on FPGAs described what may be the most radical technology of them all: FPGAs using electromechanical relays. No, this is not an early April Fool's joke, nor is it one of those "let's see if anyone will publish this one" academic exercises. The paper presented work by professors and students at the Stanford University departments of electrical engineering and computer science, and researchers at Altera Corp. The work was supported in part by DARPA funding.

Tiny semiconductor dots could lead to a new type of circuit based on magnetism rather than current flow. At least that’s the hope of researchers who’ve made the dots and are hoping to build them into a workable device. ”We want to make it into a so-called nonvolatile transistor,” says Kang Wang, head of the Device Research Laboratory at the University of California, Los Angeles. Such a ”spintronic” transistor would retain its logic state in the absence of current and require less power to switch a bit, reducing the electrical power required by a computer chip by as much as 99 percent. Wang’s research, supported in part by Intel, was published in March in the online version of Nature Materials. Where electronic transistors rely on the presence or absence of current to register the ones and zeros of digital logic, spintronic transistors depend on ”spin,” a quantum characteristic of the electron. Picture the electron as a rotating globe. When the north pole is pointing upward, that’s spin up; when pointing the other way, it’s spin down. When the spins of most electrons are aligned, the material is magnetic. When their spins are random, the material isn’t. An applied current can align or randomize the spins, allowing for spin-based switches.