PCB (Printed Circuit Board) Layout and Routing Recommendations and Techniques - 0 views

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  #1 Freddy Barefoot on 26 May 12

   

  pcb circuit design
  
  If you use and FPGAs or High-Speed processors, you should know that a excellent amount of flip-flops are switching at any offered moment in your method. Their switching causes a big sum of present going back-and-forward by means of their power and ground pins. The ground-pins in this situation can make ground-bounce if the sum of recent (and in particular the slew-price) is substantial. I ought to remind you of the famous V=L. di/dt (Delta-Voltage equals inductance x existing-price). If you use a track (for instance) to route ground signal, you will have different voltages on just about every side of the track. It will be incredibly humorous to have +.5V on one side of your ground, and -1V on the other side.
  
  This will lead to Total Method FAILURE. I recall encountering this issue in early days, which forced me to query even the quite basic physique rules I knew. Finding this bug can be tricky, and even if found, you will have no alternative but to create an additional prototype.
  
  The very same rule applies for power-plane two. You can simply have drops in certain tracks if you do not use a plane, or a huge electrical power-islands, to support your electrical power voltage. Working with a better number of decoupling capacitors is highly advised for high-speed and higher-powered processors/FPGAs, near their energy lines.
  
  The RF segment, and the electrical power-supply switching sections wants specific care for their ground-planes. Their islands should be isolated from the program ground-plane, and should have tracks connecting your switching island to technique ground (the tracks should be big sufficient to have close to-zero DC resistance, but not far more). This is simply because switching and RF section, can create waves on ground-plane, which can create ground-bounce on your systems ground. You can search google on this topic if you need to have additional explanation.
  
  six. High-Speed differential Signals
  
  Todays models always have a high-speed differential connection. Examples are PCI-Express, High-Speed USB and SATA. For these lines, certain rules apply:
  
  

  
  
  1. There should not be any ground-plane split beneath these connections.
  
  
  2. Their impedance ought to be meticulously matched.
  
  
  3. There should not be a lot more than 2 millimeters difference in LENGTH for every connection.
  
  
  4. Connections must preserve the same distance involving every single other till they attain location.
  
  
  5. There should not be any sharp corners. Avoid 45 degrees or 90 degrees. This might cause unwanted Capacitive coupling, or it can lead to the are act a tiny antennas.
  
  
  6. Preserve all other signals far from these lines. I suggest minimal five millimeters separation. This will reduce cross-talk.

  
  
  I propose using Strip-lines for these connections. But yet again, many Micro-Strip will do fine as nicely.
  ????
  7. Substantial-Speed single-ended connections
  
  Dealing with large-speed single-ended connections can be demanding. Since they are not differential lines, any noise on these lines will impact their state, and will trigger process failure. HSTL, SSTL and GTL+ are good examples. LVTTL must be handled as nicely.
  
  When routing these lines, take these recommendations into consideration:
  
  

  
  
  1. Impedance-matching is a Need to for these connections.
  
  

   

  <div class="cArrow"> </div><div class="cContentInner"><a href="http://www.freedomcad.com" rel="nofollow">pcb circuit design</a><br /><br />If you use and FPGAs or High-Speed processors, you should know that a excellent amount of flip-flops are switching at any offered moment in your method. Their switching causes a big sum of present going back-and-forward by means of their power and ground pins. The ground-pins in this situation can make ground-bounce if the sum of recent (and in particular the slew-price) is substantial. I ought to remind you of the famous V=L. di/dt (Delta-Voltage equals inductance x existing-price). If you use a track (for instance) to route ground signal, you will have different voltages on just about every side of the track. It will be incredibly humorous to have +.5V on one side of your ground, and -1V on the other side.<br /><br />This will lead to Total Method FAILURE. I recall encountering this issue in early days, which forced me to query even the quite basic physique rules I knew. Finding this bug can be tricky, and even if found, you will have no alternative but to create an additional prototype.<br /><br />The very same rule applies for power-plane two. You can simply have drops in certain tracks if you do not use a plane, or a huge electrical power-islands, to support your electrical power voltage. Working with a better number of decoupling capacitors is highly advised for high-speed and higher-powered processors/FPGAs, near their energy lines.<br /><br />The RF segment, and the electrical power-supply switching sections wants specific care for their ground-planes. Their islands should be isolated from the program ground-plane, and should have tracks connecting your switching island to technique ground (the tracks should be big sufficient to have close to-zero DC resistance, but not far more). This is simply because switching and RF section, can create waves on ground-plane, which can create ground-bounce on your systems ground. You can search google on this topic if you need to have additional explanation.<br /><br /><strong>six. High-Speed differential Signals</strong><br /><br />Todays models always have a high-speed differential connection. Examples are PCI-Express, High-Speed USB and SATA. For these lines, certain rules apply:<br /><br /><ol><br /><li>There should not be any ground-plane split beneath these connections.</li><br /><li>Their impedance ought to be meticulously matched.</li><br /><li>There should not be a lot more than 2 millimeters difference in LENGTH for every connection.</li><br /><li>Connections must preserve the same distance involving every single other till they attain location.</li><br /><li>There should not be any sharp corners. Avoid 45 degrees or 90 degrees. This might cause unwanted Capacitive coupling, or it can lead to the are act a tiny antennas.</li><br /><li>Preserve all other signals far from these lines. I suggest minimal five millimeters separation. This will reduce cross-talk.</li></ol><br /><br />I propose using Strip-lines for these connections. But yet again, many Micro-Strip will do fine as nicely.<br />????<br /><strong>7. Substantial-Speed single-ended connections</strong><br /><br />Dealing with large-speed single-ended connections can be demanding. Since they are not differential lines, any noise on these lines will impact their state, and will trigger process failure. HSTL, SSTL and GTL+ are good examples. LVTTL must be handled as nicely.<br /><br />When routing these lines, take these recommendations into consideration:<br /><br /><ol><br /><li>Impedance-matching is a Need to for these connections.</li><br /></ol></div>

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